Datasheet AD7655 (Analog Devices) - 5

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AD7655 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit
POWER SUPPLIES Specified Performance AVDD 4.75 5 5.25 V DVDD 4.75 5 5.25 V OVDD 2.7 5.25 8 V Operating Current 9 500 kSPS throughput AVDD 15.5 mA DVDD 8.5 mA OVDD 100 µA Power Dissipation 500 kSPS throughput9 120 135 mW 10 kSPS throughput 10 2.6 mW 444 kSPS throughput10 114 125 mW TEMPERATURE RANGE11 Specified Performance TMIN to TMAX −40 +85 °C 1 See the Analog Inputs section. 2 Linearity is tested using endpoints, not best fit. 3 LSB means least significant bit. With the 0 V to 5 V input range, 1 LSB is 76.294 µV. 4 See the Terminology section. These specifications do not include the error contribution from the external reference. 5 All specifications in dB are referred to as ful -scale input, FS. Tested with an input signal at 0.5 dB below ful scale unless otherwise specified. 6 Parallel or serial 16 bit. 7 Conversion results are available immediately after completed conversion. 8 The maximum should be the minimum of 5.25 V and DVDD + 0.3 V. 9 In normal mode; tested in paral el reading mode. 10 In impulse mode; tested in paral el reading mode. 11 Consult sales for extended temperature range. Rev. E | Page 4 of 26 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION CIRCUIT INFORMATION MODES OF OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS INPUT CHANNEL MULTIPLEXER DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT POWER SUPPLY POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) Channel A/ Output SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Convert External Clock Data Read (Previous) During Convert MICROPROCESSOR INTERFACING SPI INTERFACE (ADSP-2191M) APPLICATION HINTS LAYOUT EVALUATING THE AD7655 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE