Datasheet AD7927 (Analog Devices) - 9

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AD7927 Data Sheet TERMINOLOGY Integral Nonlinearity (INL) Negative Gain Error
INL is the maximum deviation from a straight line passing This applies when using the twos complement output coding through the endpoints of the ADC transfer function. The end- option, in particular to the 2 × REFIN input range with −REFIN points of the transfer function are zero scale, a point 1 LSB to +REFIN biased about the REFIN point. It is the deviation of below the first code transition, and full scale, a point 1 LSB the first code transition (100 . 000) to (100 . 001) from the above the last code transition. Figure 9 shows a typical INL ideal (that is, −REFIN + 1 LSB) after the zero code error has been plot for the AD7927. adjusted out.
Differential Nonlinearity (DNL) Negative Gain Error Match
DNL is the difference between the measured and the ideal This is the difference in negative gain error between any two 1 LSB change between any two adjacent codes in the ADC. channels. Figure 10 shows a typical DNL plot for the AD7927.
Channel-to-Channel Isolation Offset Error
Channel-to-channel isolation is a measure of the level of This is the deviation of the first code transition (00 . 000) to crosstalk between channels. It is measured by applying a full- (00 . 001) from the ideal, that is, AGND + 1 LSB. scale 400 kHz sine wave signal to all seven nonselected input channels and determining how much that signal is attenuated
Offset Error Match
in the selected channel with a 50 kHz signal. The figure given is This is the difference in offset error between any two channels. the worst case across all eight channels for the AD7927.
Gain Error Power Supply Rejection (PSR)
This is the deviation of the last code transition (111 . 110) to Variations in power supply affect the full-scale transition, (111 . 111) from the ideal (that is, REFIN − 1 LSB) after the but not the converter’s linearity. Power supply rejection is the offset error has been adjusted out. maximum change in full-scale transition point due to a change
Gain Error Match
in power supply voltage from the nominal value (see the Typical This is the difference in gain error between any two channels. Performance Characteristics section).
Zero Code Error Power Supply Rejection Ration (PSRR)
This applies when using the twos complement output coding The power supply rejection ratio is defined as the ratio of the option, in particular to the 2 × REF power in the ADC output at full-scale frequency (f) to the IN input range with −REFIN to +REF power of a 200 mV p-p sine wave applied to the ADC AVDD IN biased about the REFIN point. It is the deviation of the midscale transition (all 0s to all 1s) from the ideal V supply of frequency (fS): IN voltage, that is, REFIN − 1 LSB. PSRR(dB) = 10log(Pf/PfS)
Zero Code Error Match
where: This is the difference in zero code error between any two Pf is equal to the power at Frequency f in ADC output. channels. PfS is equal to the power at Frequency fS coupled onto the ADC AVDD.
Positive Gain Error
Here a 200 mV p-p sine wave is coupled onto the AVDD supply. This applies when using the twos complement output coding Figure 6 shows the power supply rejection ratio vs. supply ripple option, in particular to the 2 × REFIN input range with −REFIN frequency for the AD7927 with no decoupling. to +REFIN biased about the REFIN point. It is the deviation of the last code transition (011. .110) to (011 . 111) from the ideal
Track-and-Hold Acquisition Time
(that is, +REFIN − 1 LSB) after the zero code error has been The track-and-hold amplifier returns into track mode at the adjusted out. end of conversion. Track-and-hold acquisition time is the time required for the output of the track-and-hold amplifier to reach
Positive Gain Error Match
its final value, within ±1 LSB, after the end of conversion. This is the difference in positive gain error between any two channels. Rev. D | Page 8 of 28 Document Outline Features General Description Functional Block Diagram Product Highlights Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Control Register Sequencer Operation Shadow Register Circuit Information Converter Operation Analog Input ADC Transfer Function Handling Bipolar Input Signals Typical Connection Diagram Analog Input Selection Digital Inputs VDRIVE The Reference Modes of Operation Normal Mode (PM1 = PM0 = 1) Full Shutdown (PM1 = 1, PM0 = 0) Auto Shutdown (PM1 = 0, PM0 = 1) Powering Up the AD7927 Power vs. Throughput Rate Serial Interface Writing Between Conversions Microprocessor Interfacing AD7927 to TMS320C541 AD7927 to ADSP-21xx AD7927 to DSP563xx Application Hints Grounding and Layout Outline Dimensions Ordering Guide Automotive Products