Datasheet AD9215 (Analog Devices) - 2

AD9215* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017 COMPARABLE PARTS TOOLS AND SIMULATIONS
View a parametric search of comparable parts. • Visual Analog • AD9215 IBIS Models
EVALUATION KITS
• AD9215 Evaluation Board
REFERENCE DESIGNS
• CN0096
DOCUMENTATION Application Notes REFERENCE MATERIALS
• AN-1142: Techniques for High Speed ADC PCB Layout
Technical Articles
• AN-282: Fundamentals of Sampled Data Systems • Correlating High-Speed ADC Performance to Multicarrier • AN-345: Grounding for Low-and-High-Frequency Circuits 3G Requirements • AN-501: Aperture Uncertainty and ADC System • Design A Clock-Distribution Strategy With Confidence Performance • DNL and Some of its Effects on Converter Performance • AN-715: A First Approach to IBIS Models: What They Are • MS-2210: Designing Power Supplies for High Speed ADC and How They Are Generated • AN-737: How ADIsimADC Models an ADC
DESIGN RESOURCES
• AN-741: Little Known Characteristics of Phase Noise • AD9215 Material Declaration • AN-742: Frequency Domain Response of Switched- • PCN-PDN Information Capacitor ADCs • Quality And Reliability • AN-756: Sampled Systems and the Effects of Clock Phase • Symbols and Footprints Noise and Jitter • AN-803: Pin Compatible High Speed ADCs Simplify Design
DISCUSSIONS
Tasks • AN-827: A Resonant Approach to Interfacing Amplifiers to View all AD9215 EngineerZone Discussions. Switched-Capacitor ADCs • AN-835: Understanding High Speed ADC Testing and
SAMPLE AND BUY
Evaluation Visit the product page to see pricing options. • AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual
TECHNICAL SUPPORT
• AN-935: Designing an ADC Transformer-Coupled Front Submit a technical question or find your regional support End number. • Very Low Jitter Encode (Sampling) Clocks for High Speed Analog-to-Digital Converters Using the ADF4002 PLL
DOCUMENT FEEDBACK Data Sheet
Submit feedback for this data sheet. • AD9215: 10-Bit, 65/80/105 MSPS, 3 V A/D Converter Data Sheet
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Document Outline Specifications Absolute Maximum Ratings1 Explanation of Test Levels ESD Caution Pin Configurations and Function Descriptions Equivalent Circuits Definitions of Specifications Aperture Delay Aperture Jitter Clock Pulse Width and Duty Cycle Differential Nonlinearity (DNL, No Missing Codes) Effective Number of Bits (ENOB) Gain Error Integral Nonlinearity (INL) Maximum Conversion Rate Minimum Conversion Rate Offset Error Out-of-Range Recovery Time Output Propagation Delay Power Supply Rejection Signal-to-Noise and Distortion (SINAD) Ratio Signal-to-Noise Ratio (SNR) Spurious-Free Dynamic Range (SFDR) Temperature Drift Total Harmonic Distortion (THD) Two-Tone SFDR Typical Performance Characteristics Applying the AD9215 Theory of Operation Analog Input and Reference Overview Differential Input Configurations Single-Ended Input Configuration Clock Input and Considerations Power Dissipation and Standby Mode Digital Outputs Timing Voltage Reference Internal Reference Connection External Reference Operation Operational Mode Selection Evaluation Board Outline Dimensions Ordering Guide