AD9236Data SheetAC SPECIFICATIONS AVDD = 3 V, DRVDD = 2.5 V, sample rate = 80 MSPS, 2 V p-p differential input, 1.0 V external reference, AIN = –0.5 dBFS, DCS off, unless otherwise noted. Table 2.AD9236BRU/AD9236BCPParameterTempTest LevelMinTypMaxUnit SIGNAL-TO-NOISE-RATIO (SNR) fIN = 2.4 MHz Full VI 68.6 dB 25°C V 70.9 dB fIN = 40 MHz 25°C V 70.4 dB fIN = 70 MHz Full IV 67.8 dB 25°C V 70.1 dB fIN = 100 MHz 25°C V 69.0 dB SIGNAL-TO-NOISE AND DISTORTION (SINAD) fIN = 2.4 MHz Full VI 68.4 dB 25°C V 70.8 dB fIN = 40 MHz 25°C V 70.2 dB fIN = 70 MHz Full IV 67.4 dB 25°C V 69.8 dB fIN = 100 MHz 25°C V 68.0 dB EFFECTIVE NUMBER OF BITS (ENOB) fIN = 2.4 MHz Full VI 11.1 Bits 25°C V 11.5 Bits fIN = 40 MHz 25°C V 11.4 Bits fIN = 70 MHz Full IV 10.9 Bits 25°C V 11.3 Bits fIN = 100 MHz 25°C V 11.0 Bits WORST SECOND OR THIRD fIN = 2.4 MHz Full VI –75.6 dBc 25°C V –91.3 dBc fIN = 40 MHz 25°C V –87.8 dBc fIN = 70 MHz Full VI –73.2 dBc 25°C V –81.4 dBc fIN = 100 MHz 25°C V –76.4 dBc SPURIOUS FREE DYNAMIC RANGE (SFDR) fIN = 2.4 MHz Full VI 75.6 dBc 25°C V 91.3 dBc fIN = 40 MHz 25°C V 87.8 dBc fIN = 70 MHz Full IV 73.2 dBc 25°C V 81.4 dBc fIN = 100 MHz 25°C V 76.4 dBc Rev. C | Page 4 of 36 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Revision History DC Specifications AC Specifications Digital Specifications Switching Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Terminology Pin Configurations and Function Descriptions Equivalent Circuits Typical Performance Characteristics Theory of Operation Analog Input and Reference Overview Differential Input Configurations Single-Ended Input Configuration Clock Input Considerations Jitter Considerations Power Dissipation and Standby Mode Digital Outputs Timing Voltage Reference Internal Reference Connection External Reference Operation Operational Mode Selection Evaluation Board TSSOP Evaluation Board LFCSP Evaluation Board Outline Dimensions Ordering Guide