Datasheet AD7679 (Analog Devices)

18-Bit, 2.5 LSB INL, 570 kSPS SAR ADC AD7679 FEATURES FUNCTIONAL BLOCK DIAGRAM 18-bit resolution with no missing codes PDBUF REF REFGND DVDD DGND No pipeline delay (SAR architecture) AGND OVDD AVDD AD7679 Differential input range: ±VREF (VREF up to 5 V) SERIAL OGND Throughput: 570 kSPS REFBUFIN PORT INL: ±2.5 LSB max (±9.5 ppm of full scale) 18 IN+ SWITCHED D[17:0] Dynamic range : 103 dB typ (V CAP DAC REF = 5 V) IN– BUSY S/(N+D): 100 dB typ @ 2 kHz (VREF = 5 V) PARALLEL INTERFACE RD Parallel (18-,16-, or 8-bit bus) and serial 5 V/3 V interface CLOCK CS SPI®/QSPI™/MICROWIRE™/DSP compatible PD CONTROL LOGIC AND MODE0 On-board reference buffer CALIBRATION CIRCUITRY RESET MODE1 Single 5 V supply operation Power dissipation: 76 mW @ 500 kSPS 150 μW @ 1 kSPS CNVST
03085–0–001
48-lead LQFP or 48-lead LFCSP package
Figure 1. Functional Block Diagram
Pin-to-pin compatible upgrade of AD7674/AD7676/AD7678 Table 1. PulSAR Selection APPLICATIONS 800– CT scanners Type/kSPS 100–250 500–570 1000 High dynamic data acquisition
Pseudo- AD7651 AD7650/AD7652 AD7653
Geophone and hydrophone sensors
Differential AD7660/AD7661 AD7664/AD7666 AD7667
Σ-Δ replacement (low power, multichannel)
True Bipolar AD7663 AD7665 AD7671
Instrumentation
True AD7675 AD7676 AD7677
Spectrum analysis
Differential
Medical instruments
18-Bit AD7678 AD7679 AD7674 Multichannel/ AD7654 Simultaneous AD7655
GENERAL DESCRIPTION PRODUCT HGHLIGHTS
The AD7679 is an 18-bit, 570 kSPS, charge redistribution SAR, 1. High Resolution, Fast Throughput. fully differential analog-to-digital converter that operates on a The AD7679 is a 570 kSPS, charge redistribution, 18-bit single 5 V power supply. The part contains a high speed 18-bit SAR ADC (no latency). sampling ADC, an internal conversion clock, an internal 2. Excellent Accuracy. reference buffer, error correction circuits, and both serial and The AD7679 has a maximum integral nonlinearity of parallel system interface ports. 2.5 LSB with no missing 18-bit codes. 3. Serial or Parallel Interface. The part is available in a 48-lead LQFP or 48-lead LFCSP with Versatile parallel (18-, 16-, or 8-bit bus) or 3-wire serial operation specified from –40°C to +85°C. interface arrangement compatible with both 3 V and 5 V logic.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DEFINITION OF SPECIFICATIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Driver Amplifier Choice Single-to-Differential Driver Voltage Reference Power Supply POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS LAYOUT EVALUATING THE AD7679’S PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE