Datasheet AD7791 (Analog Devices)

Low Power, Buffered 24-Bit Sigma-Delta ADC Data Sheet AD7791 FEATURES FUNCTIONAL BLOCK DIAGRAM Power GND V REFIN(+) REFIN(–) Supply: 2.5 V to 5.25 V operation DD Normal: 75 μA max VDD CLOCK Power-down: 1 μA max RMS noise: 1.1 μV at 9.5 Hz update rate AIN(+) DOUT/RDY 19.5-bit p-p resolution (22 bits effective resolution)
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BUF ADC DIN Integral nonlinearity: 3.5 ppm typical AIN(–) SERIAL INTERFACE SCLK Simultaneous 50 Hz and 60 Hz rejection CS AD7791 Internal clock oscillator GND Rail-to-rail input buffer
04227-0-001
V
Figure 1.
DD monitor channel Temperature range: –40°C to +105°C 10-lead MSOP GENERAL DESCRIPTION
The AD7791 is a low power, complete analog front end for
INTERFACE
low frequency measurement applications. It contains a low
3-wire serial
noise 24-bit ∑-Δ ADC with one differential input that can be
SPI®, QSPI™, MICROWIRE™, and DSP compatible
buffered or unbuffered.
Schmitt trigger on SCLK
The device operates from an internal clock. Therefore, the user
APPLICATIONS
does not have to supply a clock source to the device. The output
Smart transmitters
data rate from the part is software programmable and can be
Battery applications
varied from 9.5 Hz to 120 Hz, with the rms noise equal to
Portable instrumentation
1.1 μV at the lower update rate. The internal clock frequency
Sensor measurement
can be divided by a factor of 2, 4, or 8, which leads to a reduc-
Temperature measurement
tion in the current consumption. The update rate, cutoff fre-
Pressure measurement
frequency, and settling time will scale with the clock frequency.
Weigh scales
The part operates with a power supply from 2.5 V to 5.25 V.
4 to 20 mA loops
When operating from a 3 V supply, the power dissipation for the part is 225 μW maximum. It is housed in a 10-lead MSOP.
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Document Outline AD7791—Specifications Timing Characteristics Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics On-chip Registers Communications Register (RS1, RS0 = 0, 0) Status Register (RS1, RS0 = 0, 0; Power-on/Reset = 0x8C) Mode Register (RS1, RS0 = 0, 1; Power-on/Reset = 0x02) Filter Register (RS1, RS0 = 1, 0; Power-on/Reset = 0x04) Data Register (RS1, RS0 = 1, 1; Power-on/Reset = 0x000000) ADC Circuit Information Overview Noise Performance Reduced Current Modes Digital Interface Single Conversion Mode Continuous Conversion Mode Continuous Read Mode Circuit Description Analog Input Channel Bipolar/Unipolar Configuration Data Output Coding Reference Input VDD Monitor Grounding and Layout Outline Dimensions Ordering Guide