Datasheet AD7440, AD7450A (Analog Devices) - 4

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AD7440/AD7450A Data Sheet Parameter Test Conditions/Comments B Version Unit
CONVERSION RATE Conversion Time 888 ns with an 18 MHz SCLK 16 SCLK cycles Track-and-Hold Acquisition Time2 Sine wave input 200 ns max Step input 290 ns max Throughput Rate 1 MSPS max POWER REQUIREMENTS V Range: 3 V + 20%/–10%; 5 V ± 5% 2.7/5.25 V min/V max DD I 8 DD Normal Mode (Static) SCLK on or off 0.5 mA typ Normal Mode (Operational) V = 4.75 V to 5.25 V 1.95 mA max DD V = 2.7 V to 3.6 V 1.45 mA max DD Full Power-Down Mode SCLK on or off 1 µA max Power Dissipation Normal Mode (Operational) V = 5 V, 1.55 mW typ for 100 kSPS9 9.25 mW max DD V = 3 V, 0.6 mW typ for 100 kSPS9 4 mW max DD Full Power-Down Mode V = 5 V, SCLK on or off 5 µW max DD V = 3 V, SCLK on or off 3 µW max DD 1 Common-mode voltage. The input signal can be centered on a dc common-mode voltage in the range specified in Figure 28 and Figure 29. 2 See the Terminology section. 3 Analog inputs with slew rates exceeding 27 V/µs (full-scale input sine wave > 3.5 MHz) within the acquisition time can cause the converter to return an incorrect result. 4 Because the input spans of VIN+ and VIN– are both VREF and are 180° out of phase, the differential voltage is 2 × VREF. 5 The AD7440 is functional with a reference input from 100 mV and for VDD = 5 V; the reference can range up to 3.5 V. 6 The AD7440 is functional with a reference input from 100 mV and for VDD = 3 V; the reference can range up to 2.2 V. 7 Guaranteed by characterization. 8 Measured with a midscale dc input. 9 See the Power vs. Throughput section. Rev. D | Page 4 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY AD7440–SPECIFICATIONS AD7450A–SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY AD7440/AD7450A–TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT Analog Input Structure DRIVING DIFFERENTIAL INPUTS Differential Amplifier Op Amp Pair RF Transformer DIGITAL INPUTS REFERENCE Example 1 Example 2 SINGLE-ENDED OPERATION SERIAL INTERFACE Timing Example 1 Timing Example 2 MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER vs. THROUGHPUT RATE GROUNDING AND LAYOUT HINTS EVALUATING THE AD7440/AD7450A PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE