link to page 4 link to page 4 link to page 5 link to page 5 link to page 5 link to page 5 AD7651 SPECIFICATIONS Table 2. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted Parameter ConditionsMinTypMaxUnit RESOLUTION 16 Bits ANALOG INPUT Voltage Range VIN – VINGND 0 VREF V Operating Input Voltage VIN –0.1 +3 V VINGND –0.1 +0.5 V Analog Input CMRR fIN = 10 kHz 65 dB Input Current 100 kSPS Throughput 1.1 µA Input Impedance1 THROUGHPUT SPEED Complete Cycle 10 µs Throughput Rate 0 100 kSPS DC ACCURACY Integral Linearity Error –6 +6 LSB2 No Missing Codes 15 Bits Differential Linearity Error –2 +3 LSB Transition Noise 0.7 LSB Unipolar Zero Error, T 3 MIN to TMAX ±5 LSB Unipolar Zero Error Temperature Drift3 ±0.25 ppm/°C Full-Scale Error, T 3 MIN to TMAX REF = 2.5 V ±0.12 % of FSR Full-Scale Error Temperature Drift ±0.6 ppm/°C Power Supply Sensitivity AVDD = 5 V ± 5% ±2 LSB AC ACCURACY Signal-to-Noise fIN = 45 kHz 86 dB4 Spurious Free Dynamic Range fIN = 45 kHz 98 dB Total Harmonic Distortion fIN = 10 kHz –98 dB fIN = 45 kHz –98 dB Signal-to-(Noise + Distortion) fIN = 45 kHz 86 dB –60 dB Input, fIN = 45 kHz 30 dB –3 dB Input Bandwidth 800 kHz SAMPLING DYNAMICS Aperture Delay 2 ns Aperture Jitter 5 ps rms Transient Response Full-Scale Step 8.75 µs REFERENCE Internal Reference Voltage VREF @ 25°C 2.48 2.5 2.52 V Internal Reference Temperature Drift –40°C to +85°C ±7 ppm/°C Line Regulation AVDD = 5 V ± 5% ±24 ppm/V Turn-On Settling Time CREF = 10 µF 5 ms Temperature Pin Voltage Output @ 25°C 300 mV Temperature Sensitivity 1 mV/°C Output Resistance 4.3 kΩ External Reference Voltage Range 2.3 2.5 AVDD – 1.85 V External Reference Current Drain 100 kSPS Throughput 35 µA Rev. 0 | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION TYPICAL CONNECTION DIAGRAM POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE SLAVE SERIAL INTERFACE MICROPROCESSOR INTERFACING APPLICATION HINTS BIPOLAR AND WIDER INPUT RANGES LAYOUT EVALUATING THE AD7651’S PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE