link to page 8 link to page 8 link to page 8 link to page 8 link to page 8 link to page 8 AD7666ABSOLUTE MAXIMUM RATINGS Table 5. AD7666 Stress Ratings11.6mAIParameter RatingOL IN2, TEMP2, REF, REFBUFIN, INGND, AVDD + 0.3 V to REFGND to AGND AGND – 0.3 V TO OUTPUT1.4VPINC Ground Voltage Differences L60pF* AGND, DGND, OGND ±0.3 V 500 µ AIOH Supply Voltages AVDD, DVDD, OVDD –0.3 V to +7 V * IN SERIAL INTERFACE MODES,THE SYNC, SCLK, AND SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD AVDD to DVDD, AVDD to OVDD ±7 V CL OF 10pF; OTHERWISE,THE LOAD IS 60pF MAXIMUM. 03033-0-002 DVDD to OVDD –0.3 V to +7 V Figure 2. Load Circuit for Digital Interface Timing, Digital Inputs –0.3 V to DVDD + 0.3 V SDOUT, SYNC, SCLK Outputs CL = 10 pF PDREF, PDBUF3 ±20 mA Internal Power Dissipation4 700 mW Internal Power Dissipation5 2.5 W 2V Junction Temperature 150°C 0.8V Storage Temperature Range –65°C to +150°C ttDELAYDELAY Lead Temperature Range 300°C 2V2V (Soldering 10 sec) 0.8V0.8V 03033-0-003 Figure 3. Voltage Reference Levels for Timing 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 See Analog Input section. 3 See the Voltage Reference Input section. 4 Specification is for the device in free air: 48-Lead LQFP; θJA = 91°C/W, θJC = 30°C/W 5 Specification is for the device in free air: 48-Lead LFCSP; θJA = 26°C/W. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 7 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Input Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Conversion External Clock Data Read During Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS BIPOLAR AND WIDER INPUT RANGES LAYOUT EVALUATING THE AD7666’S PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE