Datasheet AD7792, AD7793 (Analog Devices) - 3
| Fabricante | Analog Devices |
| Descripción | 3-Channel, Low Noise, Low Power, 24-Bit Sigma Delta ADC with On-Chip In-Amp and Reference |
| Páginas / Página | 32 / 3 — AD7792/AD7793. SPECIFICATIONS. Table 1. Parameter. AD7792B/AD7793B1. … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 464 Kb |
| Idioma del documento | Inglés |
AD7792/AD7793. SPECIFICATIONS. Table 1. Parameter. AD7792B/AD7793B1. Unit. Test Conditions/Comments
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AD7792/AD7793 SPECIFICATIONS
AVDD = 2.7 V to 5.25 V; DVDD = 2.7 V to 5.25 V; GND = 0 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 1. Parameter AD7792B/AD7793B1 Unit Test Conditions/Comments
ADC CHANNEL Output Update Rate 4.17 to 470 Hz nom No Missing Codes2 24 Bits min fADC < 242 Hz, AD7793 16 Bits min AD7792 Resolution See Output Noise and Resolution Specifications Output Noise and Update Rates See Output Noise and Resolution Specifications Integral Nonlinearity ±15 ppm of FSR max Offset Error3 ±1 μV typ Offset Error Drift vs. Temperature4 ±10 nV/°C typ Full-Scale Error3, 5 ±10 μV typ Gain Drift vs. Temperature4 ±1 ppm/°C typ Gain = 1 to 16, external reference ±3 ppm/°C typ Gain = 32 to 128, external reference Power Supply Rejection 100 dB min AIN = 1 V/gain, gain ≥ 4, external reference ANALOG INPUTS Differential Input Voltage Ranges ±VREF/Gain V nom VREF = REFIN(+) − REFIN(−) or internal reference, gain = 1 to 128 Absolute AIN Voltage Limits2 Unbuffered Mode GND – 30 mV V min Gain = 1 or 2 AVDD + 30 mV V max Buffered Mode GND + 100 mV V min Gain = 1 or 2 AVDD – 100 mV V max In-Amp Active GND + 300 mV V min Gain = 4 to 128 AVDD – 1.1 V max Common-Mode Voltage, VCM 0.5 V min VCM = (AIN(+) + AIN(−))/2, gain = 4 to 128 Analog Input Current Buffered Mode or In-Amp Active Average Input Current2 ±1 nA max Gain = 1 or 2, update rate < 100 Hz ±250 pA max Gain = 4 to 128, update rate < 100 Hz Average Input Current Drift ±2 pA/°C typ Unbuffered Mode Gain = 1 or 2. Average Input Current ±400 nA/V typ Input current varies with input voltage Average Input Current Drift ±50 pA/V/°C typ Normal Mode Rejection2 Internal Clock @ 50 Hz, 60 Hz 65 dB min 80 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 @ 50 Hz 80 dB min 90 dB typ, 50 ± 1 Hz, FS[3:0] = 10016 @ 60 Hz 90 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 10006 External Clock @ 50 Hz, 60 Hz 80 dB min 90 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 @ 50 Hz 94 dB min 100 dB typ, 50 ± 1 Hz, FS[3:0] = 10016 @ 60 Hz 90 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 10006 Common-Mode Rejection @ DC 100 dB min AIN = 1 V/gain, gain ≥ 4 @ 50 Hz, 60 Hz2 100 dB min 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 @ 50 Hz, 60 Hz2 100 dB min 50 ± 1 Hz (FS[3:0] = 1001)6, 60 ± 1 Hz (FS[3:0] = 1000)6 Rev. B | Page 3 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTPUT NOISE AND RESOLUTION SPECIFICATIONS EXTERNAL REFERENCE INTERNAL REFERENCE TYPICAL PERFORMANCE CHARACTERISTICS ON-CHIP REGISTERS COMMUNICATIONS REGISTER RS2, RS1, RS0 = 0, 0, 0 STATUS REGISTER RS2, RS1, RS0 = 0, 0, 0; Power-On/Reset = 0x80 (AD7792)/0x88 (AD7793) MODE REGISTER RS2, RS1, RS0 = 0, 0, 1; Power-On/Reset = 0x000A CONFIGURATION REGISTER RS2, RS1, RS0 = 0, 1, 0; Power-On/Reset = 0x0710 DATA REGISTER RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000(00) ID REGISTER RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xXA (AD7792)/0xXB (AD7793) IO REGISTER RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00 OFFSET REGISTER RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x8000 (AD7792)/0x800000 (AD7793) FULL-SCALE REGISTER RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXX (AD7792)/0x5XXX00 (AD7793) ADC CIRCUIT INFORMATION OVERVIEW DIGITAL INTERFACE Single Conversion Mode Continuous Conversion Mode Continuous Read CIRCUIT DESCRIPTION ANALOG INPUT CHANNEL INSTRUMENTATION AMPLIFIER BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS EXCITATION CURRENTS BIAS VOLTAGE GENERATOR REFERENCE RESET AVDD MONITOR CALIBRATION GROUNDING AND LAYOUT APPLICATIONS INFORMATION TEMPERATURE MEASUREMENT USING A THERMOCOUPLE TEMPERATURE MEASUREMENT USING AN RTD OUTLINE DIMENSIONS ORDERING GUIDE
AD7792/AD7793 SPECIFICATIONS
AVDD = 2.7 V to 5.25 V; DVDD = 2.7 V to 5.25 V; GND = 0 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 1. Parameter AD7792B/AD7793B1 Unit Test Conditions/Comments
ADC CHANNEL Output Update Rate 4.17 to 470 Hz nom No Missing Codes2 24 Bits min fADC < 242 Hz, AD7793 16 Bits min AD7792 Resolution See Output Noise and Resolution Specifications Output Noise and Update Rates See Output Noise and Resolution Specifications Integral Nonlinearity ±15 ppm of FSR max Offset Error3 ±1 μV typ Offset Error Drift vs. Temperature4 ±10 nV/°C typ Full-Scale Error3, 5 ±10 μV typ Gain Drift vs. Temperature4 ±1 ppm/°C typ Gain = 1 to 16, external reference ±3 ppm/°C typ Gain = 32 to 128, external reference Power Supply Rejection 100 dB min AIN = 1 V/gain, gain ≥ 4, external reference ANALOG INPUTS Differential Input Voltage Ranges ±VREF/Gain V nom VREF = REFIN(+) − REFIN(−) or internal reference, gain = 1 to 128 Absolute AIN Voltage Limits2 Unbuffered Mode GND – 30 mV V min Gain = 1 or 2 AVDD + 30 mV V max Buffered Mode GND + 100 mV V min Gain = 1 or 2 AVDD – 100 mV V max In-Amp Active GND + 300 mV V min Gain = 4 to 128 AVDD – 1.1 V max Common-Mode Voltage, VCM 0.5 V min VCM = (AIN(+) + AIN(−))/2, gain = 4 to 128 Analog Input Current Buffered Mode or In-Amp Active Average Input Current2 ±1 nA max Gain = 1 or 2, update rate < 100 Hz ±250 pA max Gain = 4 to 128, update rate < 100 Hz Average Input Current Drift ±2 pA/°C typ Unbuffered Mode Gain = 1 or 2. Average Input Current ±400 nA/V typ Input current varies with input voltage Average Input Current Drift ±50 pA/V/°C typ Normal Mode Rejection2 Internal Clock @ 50 Hz, 60 Hz 65 dB min 80 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 @ 50 Hz 80 dB min 90 dB typ, 50 ± 1 Hz, FS[3:0] = 10016 @ 60 Hz 90 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 10006 External Clock @ 50 Hz, 60 Hz 80 dB min 90 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 @ 50 Hz 94 dB min 100 dB typ, 50 ± 1 Hz, FS[3:0] = 10016 @ 60 Hz 90 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 10006 Common-Mode Rejection @ DC 100 dB min AIN = 1 V/gain, gain ≥ 4 @ 50 Hz, 60 Hz2 100 dB min 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 @ 50 Hz, 60 Hz2 100 dB min 50 ± 1 Hz (FS[3:0] = 1001)6, 60 ± 1 Hz (FS[3:0] = 1000)6 Rev. B | Page 3 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTPUT NOISE AND RESOLUTION SPECIFICATIONS EXTERNAL REFERENCE INTERNAL REFERENCE TYPICAL PERFORMANCE CHARACTERISTICS ON-CHIP REGISTERS COMMUNICATIONS REGISTER RS2, RS1, RS0 = 0, 0, 0 STATUS REGISTER RS2, RS1, RS0 = 0, 0, 0; Power-On/Reset = 0x80 (AD7792)/0x88 (AD7793) MODE REGISTER RS2, RS1, RS0 = 0, 0, 1; Power-On/Reset = 0x000A CONFIGURATION REGISTER RS2, RS1, RS0 = 0, 1, 0; Power-On/Reset = 0x0710 DATA REGISTER RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000(00) ID REGISTER RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xXA (AD7792)/0xXB (AD7793) IO REGISTER RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00 OFFSET REGISTER RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x8000 (AD7792)/0x800000 (AD7793) FULL-SCALE REGISTER RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXX (AD7792)/0x5XXX00 (AD7793) ADC CIRCUIT INFORMATION OVERVIEW DIGITAL INTERFACE Single Conversion Mode Continuous Conversion Mode Continuous Read CIRCUIT DESCRIPTION ANALOG INPUT CHANNEL INSTRUMENTATION AMPLIFIER BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS EXCITATION CURRENTS BIAS VOLTAGE GENERATOR REFERENCE RESET AVDD MONITOR CALIBRATION GROUNDING AND LAYOUT APPLICATIONS INFORMATION TEMPERATURE MEASUREMENT USING A THERMOCOUPLE TEMPERATURE MEASUREMENT USING AN RTD OUTLINE DIMENSIONS ORDERING GUIDE