Datasheet AD7938, AD7939 (Analog Devices) - 3
| Fabricante | Analog Devices |
| Descripción | 8-Channel, 1.5 MSPS, 10-Bit Parallel ADCs with a Sequencer |
| Páginas / Página | 36 / 3 — Data Sheet. AD7938/AD7939. SPECIFICATIONS AD7938 SPECIFICATIONS. Table 2. … |
| Revisión | E |
| Formato / tamaño de archivo | PDF / 637 Kb |
| Idioma del documento | Inglés |
Data Sheet. AD7938/AD7939. SPECIFICATIONS AD7938 SPECIFICATIONS. Table 2. Parameter. Value1. Unit. Test Conditions/Comments
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Data Sheet AD7938/AD7939 SPECIFICATIONS AD7938 SPECIFICATIONS
VDD = VDRIVE = 2.7 V to 5.25 V, internal/external VREF = 2.5 V, unless otherwise noted, fCLKIN= 25.5 MHz, fSAMPLE = 1.5 MSPS; TA = TMIN to TMAX, unless otherwise noted.
Table 2. Parameter Value1 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 50 kHz sine wave Signal-to-Noise and Distortion (SINAD)2 69 dB min Differential mode 67 dB min Single-ended mode Signal-to-Noise Ratio (SNR)2 71 dB min Differential mode 69 dB min Single-ended mode Total Harmonic Distortion (THD)2 −73 dB max −85 dB typ, differential mode −69.5 dB max −80 dB typ, single-ended mode Peak Harmonic or Spurious Noise (SFDR)2 −72 dB max −82 dB typ Intermodulation Distortion (IMD)2 fa = 30 kHz, fb = 50 kHz Second-Order Terms −6 dB typ Third-Order Terms −90 dB typ Channel-to-Channel Isolation −85 dB typ fIN = 50 kHz, fNOISE = 300 kHz Aperture Delay2 5 ns typ Aperture Jitter2 72 ps typ Full Power Bandwidth2 50 MHz typ @ 3 dB 10 MHz typ @ 0.1 dB DC ACCURACY Resolution 12 Bits Integral Nonlinearity2 ±1 LSB max Differential mode ±1.5 LSB max Single-ended mode Differential Nonlinearity2 Differential Mode ±0.95 LSB max Guaranteed no missed codes to 12 bits Single-Ended Mode −0.95/+1.5 LSB max Guaranteed no missed codes to 12 bits Single-Ended and Pseudo Differential Input Straight binary output coding Offset Error2 ±12 LSB max Offset Error Match2 ±3 LSB max Gain Error2 ±3 LSB max Gain Error Match2 ±2 LSB max Fully Differential Input Twos complement output coding Positive Gain Error2 ±3 LSB max Positive Gain Error Match2 ±1.5 LSB typ Zero-Code Error2 ±9.5 LSB max Zero-Code Error Match2 ±1 LSB typ Negative Gain Error2 ±3 LSB max Negative Gain Error Match2 ±1.5 LSB typ ANALOG INPUT Single-Ended Input Range 0 to VREF V RANGE bit = 0 0 to 2 × VREF V RANGE bit = 1 Pseudo Differential Input Range VIN+ 0 to VREF V RANGE bit = 0 0 to 2 × VREF V RANGE bit = 1 VIN− −0.3 to +0.7 V typ VDD = 3 V −0.3 to +1.8 V typ VDD = 5 V Fully Differential Input Range VIN+ and VIN− VCM ± VREF/2 V VCM = common-mode voltage3 = VREF/2 VIN+ and VIN− VCM ± VREF V VCM = VREF, VIN+ or VIN− must remain within GND/VDD DC Leakage Current4 ±1 µA max Input Capacitance 45 pF typ When in track 10 pF typ When in hold Rev. D | Page 3 of 36 Document Outline FEATURES GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS AD7938 SPECIFICATIONS AD7939 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY ON-CHIP REGISTERS CONTROL REGISTER SEQUENCER OPERATION Writing to the Control Register to Program the Sequencer SHADOW REGISTER CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT STRUCTURE ANALOG INPUTS Single-Ended Mode Differential Mode Driving Differential Inputs Using an Op Amp Pair Pseudo Differential Mode ANALOG INPUT SELECTION Traditional Multichannel Operation (SEQ = SHDW = 0) Using the Sequencer: Programmable Sequence (SEQ = 0, SHDW = 1) Consecutive Sequence (SEQ = 1, SHDW = 1) REFERENCE Digital Inputs VDRIVE Input PARALLEL INTERFACE Reading Data from the AD7938/AD7939 Writing Data to the AD7938/AD7939 POWER MODES OF OPERATION Normal Mode (PM1 = PM0 = 0) Autoshutdown (PM1 = 0; PM0 = 1) Autostandby (PM1 = 1; PM0 = 0) Full Shutdown Mode (PM1 =1; PM0 = 1) POWER vs. THROUGHPUT RATE MICROPROCESSOR INTERFACING AD7938/AD7939 to ADSP-21xx Interface AD7938/AD7939 to ADSP-21065L Interface AD7938/AD7939 to TMS32020, TMS320C25, and TMS320C5x Interface AD7938/AD7939 to 80C186 Interface APPLICATION HINTS GROUNDING AND LAYOUT PCB DESIGN GUIDELINES FOR CHIP SCALE PACKAGE EVALUATING AD7938/AD7939 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD7938/AD7939 SPECIFICATIONS AD7938 SPECIFICATIONS
VDD = VDRIVE = 2.7 V to 5.25 V, internal/external VREF = 2.5 V, unless otherwise noted, fCLKIN= 25.5 MHz, fSAMPLE = 1.5 MSPS; TA = TMIN to TMAX, unless otherwise noted.
Table 2. Parameter Value1 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 50 kHz sine wave Signal-to-Noise and Distortion (SINAD)2 69 dB min Differential mode 67 dB min Single-ended mode Signal-to-Noise Ratio (SNR)2 71 dB min Differential mode 69 dB min Single-ended mode Total Harmonic Distortion (THD)2 −73 dB max −85 dB typ, differential mode −69.5 dB max −80 dB typ, single-ended mode Peak Harmonic or Spurious Noise (SFDR)2 −72 dB max −82 dB typ Intermodulation Distortion (IMD)2 fa = 30 kHz, fb = 50 kHz Second-Order Terms −6 dB typ Third-Order Terms −90 dB typ Channel-to-Channel Isolation −85 dB typ fIN = 50 kHz, fNOISE = 300 kHz Aperture Delay2 5 ns typ Aperture Jitter2 72 ps typ Full Power Bandwidth2 50 MHz typ @ 3 dB 10 MHz typ @ 0.1 dB DC ACCURACY Resolution 12 Bits Integral Nonlinearity2 ±1 LSB max Differential mode ±1.5 LSB max Single-ended mode Differential Nonlinearity2 Differential Mode ±0.95 LSB max Guaranteed no missed codes to 12 bits Single-Ended Mode −0.95/+1.5 LSB max Guaranteed no missed codes to 12 bits Single-Ended and Pseudo Differential Input Straight binary output coding Offset Error2 ±12 LSB max Offset Error Match2 ±3 LSB max Gain Error2 ±3 LSB max Gain Error Match2 ±2 LSB max Fully Differential Input Twos complement output coding Positive Gain Error2 ±3 LSB max Positive Gain Error Match2 ±1.5 LSB typ Zero-Code Error2 ±9.5 LSB max Zero-Code Error Match2 ±1 LSB typ Negative Gain Error2 ±3 LSB max Negative Gain Error Match2 ±1.5 LSB typ ANALOG INPUT Single-Ended Input Range 0 to VREF V RANGE bit = 0 0 to 2 × VREF V RANGE bit = 1 Pseudo Differential Input Range VIN+ 0 to VREF V RANGE bit = 0 0 to 2 × VREF V RANGE bit = 1 VIN− −0.3 to +0.7 V typ VDD = 3 V −0.3 to +1.8 V typ VDD = 5 V Fully Differential Input Range VIN+ and VIN− VCM ± VREF/2 V VCM = common-mode voltage3 = VREF/2 VIN+ and VIN− VCM ± VREF V VCM = VREF, VIN+ or VIN− must remain within GND/VDD DC Leakage Current4 ±1 µA max Input Capacitance 45 pF typ When in track 10 pF typ When in hold Rev. D | Page 3 of 36 Document Outline FEATURES GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS AD7938 SPECIFICATIONS AD7939 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY ON-CHIP REGISTERS CONTROL REGISTER SEQUENCER OPERATION Writing to the Control Register to Program the Sequencer SHADOW REGISTER CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT STRUCTURE ANALOG INPUTS Single-Ended Mode Differential Mode Driving Differential Inputs Using an Op Amp Pair Pseudo Differential Mode ANALOG INPUT SELECTION Traditional Multichannel Operation (SEQ = SHDW = 0) Using the Sequencer: Programmable Sequence (SEQ = 0, SHDW = 1) Consecutive Sequence (SEQ = 1, SHDW = 1) REFERENCE Digital Inputs VDRIVE Input PARALLEL INTERFACE Reading Data from the AD7938/AD7939 Writing Data to the AD7938/AD7939 POWER MODES OF OPERATION Normal Mode (PM1 = PM0 = 0) Autoshutdown (PM1 = 0; PM0 = 1) Autostandby (PM1 = 1; PM0 = 0) Full Shutdown Mode (PM1 =1; PM0 = 1) POWER vs. THROUGHPUT RATE MICROPROCESSOR INTERFACING AD7938/AD7939 to ADSP-21xx Interface AD7938/AD7939 to ADSP-21065L Interface AD7938/AD7939 to TMS32020, TMS320C25, and TMS320C5x Interface AD7938/AD7939 to 80C186 Interface APPLICATION HINTS GROUNDING AND LAYOUT PCB DESIGN GUIDELINES FOR CHIP SCALE PACKAGE EVALUATING AD7938/AD7939 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE