Datasheet AD7993, AD7994 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | 4 Channel, 12-Bit ADC with I2C Compatible Interface in 16-Lead TSSOP |
| Páginas / Página | 32 / 8 — AD7993/AD7994. Limit at TMIN, TMAX. Parameter Conditions. Min. Max. Unit. … |
| Formato / tamaño de archivo | PDF / 1.1 Mb |
| Idioma del documento | Inglés |
AD7993/AD7994. Limit at TMIN, TMAX. Parameter Conditions. Min. Max. Unit. Description. t11. t12. SCL. t10. SDA
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AD7993/AD7994 AD7993/AD7994 Limit at TMIN, TMAX Parameter Conditions Min Max Unit Description
t10 Standard mode 300 ns tFDA, fall time of SDA signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF max 10 80 ns CB = 400 pF max 20 160 ns t11 Standard mode 1000 ns tRCL, rise time of SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF max 10 40 ns CB = 400 pF max 20 80 ns t11A Standard mode 1000 ns tRCL1, rise time of SCL signal after a repeated start condition and after an acknowledge bit Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF max 10 80 ns CB = 400 pF max 20 160 ns t12 Standard mode 300 ns tFCL, fall time of SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF max 10 40 ns CB = 400 pF max 20 80 ns t 2 SP Fast mode 0 50 ns Pulse width of suppressed spike High speed mode 0 10 ns tPOWER-UP 1 typ µs Power-up time 1 A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge. 2 For 3 V supplies, the maximum hold time with CB = 100 pF max is 100 ns max.
t11 t12 t2 t6 SCL t6 t t 4 t3 5 t8 t1 t9 t10 SDA t7 P S S P S = START CONDITION P = STOP CONDITION
03472-0-002 Figure 2. Two-Wire Serial Interface Timing Diagram Rev. 0 | Page 8 of 32 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS AD7993 SPECIFICATIONS AD7994 SPECIFICATIONS I2C TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION TYPICAL CONNECTION DIAGRAM ANALOG INPUT INTERNAL REGISTER STRUCTURE ADDRESS POINTER REGISTER CONFIGURATION REGISTER CONVERSION RESULT REGISTER LIMIT REGISTERS ALERT STATUS REGISTER CYCLE TIMER REGISTER SAMPLE DELAY AND BIT TRIAL DELAY SERIAL INTERFACE SERIAL BUS ADDRESS WRITING TO THE AD7993/AD7994 WRITING TO THE ADDRESS POINTER REGISTER FOR A SUBSEQUENT REA WRITING A SINGLE BYTE OF DATA TO THE ALERT STATUS REGISTER O WRITING TWO BYTES OF DATA TO A LIMIT OR HYSTERESIS REGISTER READING DATA FROM THE AD7993/AD7994 ALERT/BUSY PIN SMBus ALERT BUSY PLACING THE AD7993-1/AD7994-1 INTO HIGH SPEED MODE THE ADDRESS SELECT (AS) PIN MODES OF OPERATION MODE 1—USING THE CONVST PIN MODE 2—COMMAND MODE MODE 3—AUTOMATIC CYCLE INTERVAL MODE OUTLINE DIMENSIONS ORDERING GUIDE RELATED PARTS IN I2C-COMPATIBLE ADC PRODUCT FAMILY
AD7993/AD7994 AD7993/AD7994 Limit at TMIN, TMAX Parameter Conditions Min Max Unit Description
t10 Standard mode 300 ns tFDA, fall time of SDA signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF max 10 80 ns CB = 400 pF max 20 160 ns t11 Standard mode 1000 ns tRCL, rise time of SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF max 10 40 ns CB = 400 pF max 20 80 ns t11A Standard mode 1000 ns tRCL1, rise time of SCL signal after a repeated start condition and after an acknowledge bit Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF max 10 80 ns CB = 400 pF max 20 160 ns t12 Standard mode 300 ns tFCL, fall time of SCL signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF max 10 40 ns CB = 400 pF max 20 80 ns t 2 SP Fast mode 0 50 ns Pulse width of suppressed spike High speed mode 0 10 ns tPOWER-UP 1 typ µs Power-up time 1 A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge. 2 For 3 V supplies, the maximum hold time with CB = 100 pF max is 100 ns max.
t11 t12 t2 t6 SCL t6 t t 4 t3 5 t8 t1 t9 t10 SDA t7 P S S P S = START CONDITION P = STOP CONDITION
03472-0-002 Figure 2. Two-Wire Serial Interface Timing Diagram Rev. 0 | Page 8 of 32 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS AD7993 SPECIFICATIONS AD7994 SPECIFICATIONS I2C TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION TYPICAL CONNECTION DIAGRAM ANALOG INPUT INTERNAL REGISTER STRUCTURE ADDRESS POINTER REGISTER CONFIGURATION REGISTER CONVERSION RESULT REGISTER LIMIT REGISTERS ALERT STATUS REGISTER CYCLE TIMER REGISTER SAMPLE DELAY AND BIT TRIAL DELAY SERIAL INTERFACE SERIAL BUS ADDRESS WRITING TO THE AD7993/AD7994 WRITING TO THE ADDRESS POINTER REGISTER FOR A SUBSEQUENT REA WRITING A SINGLE BYTE OF DATA TO THE ALERT STATUS REGISTER O WRITING TWO BYTES OF DATA TO A LIMIT OR HYSTERESIS REGISTER READING DATA FROM THE AD7993/AD7994 ALERT/BUSY PIN SMBus ALERT BUSY PLACING THE AD7993-1/AD7994-1 INTO HIGH SPEED MODE THE ADDRESS SELECT (AS) PIN MODES OF OPERATION MODE 1—USING THE CONVST PIN MODE 2—COMMAND MODE MODE 3—AUTOMATIC CYCLE INTERVAL MODE OUTLINE DIMENSIONS ORDERING GUIDE RELATED PARTS IN I2C-COMPATIBLE ADC PRODUCT FAMILY