Datasheet AD7687 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | 16-Bit, 1.5 LSB INL, 250 kSPS PulSAR™ Differential ADC in MSOP/QFN |
| Páginas / Página | 27 / 7 — AD7687. Data Sheet. TIMING SPECIFICATIONS. Table 4. Parameter. Symbol. … |
| Revisión | E |
| Formato / tamaño de archivo | PDF / 625 Kb |
| Idioma del documento | Inglés |
AD7687. Data Sheet. TIMING SPECIFICATIONS. Table 4. Parameter. Symbol. Min. Typ. Max. Unit
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AD7687 Data Sheet TIMING SPECIFICATIONS
−40°C to +85°C, VDD = 4.5 V to 5.5 V, VIO = 2.3 V to 5.5 V or VDD + 0.3 V, whichever is the lowest, unless otherwise stated. See Figure 2 and Figure 3 for load conditions.
Table 4. Parameter Symbol Min Typ Max Unit
CONVERSION TIME: CNV RISING EDGE TO DATA AVAILABLE tCONV 0.5 2.2 µs ACQUISITION TIME tACQ 1.8 µs TIME BETWEEN CONVERSIONS tCYC 4 µs CNV PULSE WIDTH (CS MODE) tCNVH 10 ns SCK PERIOD tSCK CS Mode 15 ns Chain Mode VIO Above 4.5 V 17 ns VIO Above 3 V 18 ns VIO Above 2.7 V 19 ns VIO Above 2.3 V 20 ns SCK TIME Low tSCKL 7 ns High tSCKH 7 ns SCK FALLING EDGE To Data Remains Valid tHSDO 5 To Data Valid Delay tDSDO VIO Above 4.5 V 14 ns VIO Above 3 V 15 ns VIO Above 2.7 V 16 ns VIO Above 2.3 V 17 ns CNV OR SDI Low to SDO D15 MSB Valid (CS Mode) tEN VIO Above 4.5 V 15 ns VIO Above 2.7 V 18 ns VIO Above 2.3 V 22 ns High or Last SCK Falling Edge to SDO High Impedance (CS Mode) tDIS 25 ns SDI Valid Setup Time from CNV Rising Edge (CS Mode) tSSDICNV 15 ns Valid Hold Time from CNV Rising Edge (CS Mode) tHSDICNV 0 ns Valid Setup Time from SCK Falling Edge (Chain Mode) tSSDISCK 3 ns Valid Hold Time from SCK Falling Edge (Chain Mode) tHSDISCK 4 ns High to SDO High (Chain Mode with BUSY indicator) tDSDOSDI VIO Above 4.5 V 15 ns VIO Above 2.3 V 26 ns SCK Valid Setup Time from CNV Rising Edge (Chain Mode) tSSCKCNV 5 ns Valid Hold Time from CNV Rising Edge (Chain Mode) tHSCKCNV 5 ns Rev. E | Page 6 of 26 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUT DRIVER AMPLIFIER CHOICE SINGLE-TO-DIFFERENTIAL DRIVER VOLTAGE REFERENCE INPUT POWER SUPPLY SUPPLYING THE ADC FROM THE REFERENCE DIGITAL INTERFACE CS\ MODE, 3-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 3-WIRE WITH BUSY INDICATOR CS\ MODE, 4-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 4-WIRE WITH BUSY INDICATOR CHAIN MODE WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATIONS INFORMATION LAYOUT EVALUATING THE PERFORMANCE OF THE AD7687 OUTLINE DIMENSIONS ORDERING GUIDE
AD7687 Data Sheet TIMING SPECIFICATIONS
−40°C to +85°C, VDD = 4.5 V to 5.5 V, VIO = 2.3 V to 5.5 V or VDD + 0.3 V, whichever is the lowest, unless otherwise stated. See Figure 2 and Figure 3 for load conditions.
Table 4. Parameter Symbol Min Typ Max Unit
CONVERSION TIME: CNV RISING EDGE TO DATA AVAILABLE tCONV 0.5 2.2 µs ACQUISITION TIME tACQ 1.8 µs TIME BETWEEN CONVERSIONS tCYC 4 µs CNV PULSE WIDTH (CS MODE) tCNVH 10 ns SCK PERIOD tSCK CS Mode 15 ns Chain Mode VIO Above 4.5 V 17 ns VIO Above 3 V 18 ns VIO Above 2.7 V 19 ns VIO Above 2.3 V 20 ns SCK TIME Low tSCKL 7 ns High tSCKH 7 ns SCK FALLING EDGE To Data Remains Valid tHSDO 5 To Data Valid Delay tDSDO VIO Above 4.5 V 14 ns VIO Above 3 V 15 ns VIO Above 2.7 V 16 ns VIO Above 2.3 V 17 ns CNV OR SDI Low to SDO D15 MSB Valid (CS Mode) tEN VIO Above 4.5 V 15 ns VIO Above 2.7 V 18 ns VIO Above 2.3 V 22 ns High or Last SCK Falling Edge to SDO High Impedance (CS Mode) tDIS 25 ns SDI Valid Setup Time from CNV Rising Edge (CS Mode) tSSDICNV 15 ns Valid Hold Time from CNV Rising Edge (CS Mode) tHSDICNV 0 ns Valid Setup Time from SCK Falling Edge (Chain Mode) tSSDISCK 3 ns Valid Hold Time from SCK Falling Edge (Chain Mode) tHSDISCK 4 ns High to SDO High (Chain Mode with BUSY indicator) tDSDOSDI VIO Above 4.5 V 15 ns VIO Above 2.3 V 26 ns SCK Valid Setup Time from CNV Rising Edge (Chain Mode) tSSCKCNV 5 ns Valid Hold Time from CNV Rising Edge (Chain Mode) tHSCKCNV 5 ns Rev. E | Page 6 of 26 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUT DRIVER AMPLIFIER CHOICE SINGLE-TO-DIFFERENTIAL DRIVER VOLTAGE REFERENCE INPUT POWER SUPPLY SUPPLYING THE ADC FROM THE REFERENCE DIGITAL INTERFACE CS\ MODE, 3-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 3-WIRE WITH BUSY INDICATOR CS\ MODE, 4-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 4-WIRE WITH BUSY INDICATOR CHAIN MODE WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATIONS INFORMATION LAYOUT EVALUATING THE PERFORMANCE OF THE AD7687 OUTLINE DIMENSIONS ORDERING GUIDE