Datasheet AD7760 (Analog Devices) - 3

AD7760 TABLE OF CONTENTS Features . 1 Writing to the AD7760 . 23 Applications. 1 Clocking the AD7760 .. 24 Functional Block Diagram . 1 Buffering the MCLK signal. 24 General Description . 1 MCLK Jitter Requirements . 24 Revision History . 3 Driving the AD7760... 26 Specifications. 4 Using the AD7760. 27 Timing Specifications . 6 Decoupling and Layout Recommendations. 28 Timing Diagrams. 7 Supply Decoupling . 29 Absolute Maximum Ratings. 8 Additional Decoupling .. 29 ESD Caution. 8 Reference Voltage Filtering . 29 Pin Configuration and Function Descriptions. 9 Differential Amplifier Components . 29 Terminology .. 11 Bias Resistor Selection . 29 Typical Performance Characteristics . 12 Layout Considerations. 29 Theory of Operation . 18 Exposed Paddle. 29 Modulator Data Output Mode. 19 Programmable FIR Filter. 30 Modulator Inputs. 19 Downloading a User-Defined Filter . 31 Modulator Data Output Scaling ... 19 Example Filter Download . 31 Modulator Data Output Mode Interface . 20 AD7760 Registers . 33 Clock Divide-by-1 Mode (CDIV = 1) ... 20 Control Register 1—Address 0x0001 . 33 Clock Divide-by-2 Mode (CDIV = 0) ... 20 Control Register 2—Address 0x0002 . 33 Using the AD7760 in Modulator Output Mode. 21 Status Register (Read Only) . 34 AD7760 Interface. 22 Offset Register—Address 0x0003. 34 Reading Data. 22 Gain Register—Address 0x0004. 34 Reading Status and Other Registers. 22 Overrange Register—Address 0x0005. 34 Sharing the Parallel Bus. 22 Outline Dimensions. 35 Synchronization. 22 Ordering Guide . 35 Rev. A | Page 2 of 36