Datasheet AD7273, AD7274 (Analog Devices) - 5

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AD7273/AD7274 AD7273 SPECIFICATIONS
VDD = 2.35 V to 3.6 V, VREF = 2.35 V to VDD, fSCLK = 48 MHz, fSAMPLE = 3 MSPS, TA = TMIN to TMAX, unless otherwise noted.
Table 3. Parameter B Grade1 Unit2 Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 1 MHz sine wave Signal-to-Noise + Distortion (SINAD)3 61 dB min Total Harmonic Distortion (THD)3 −72 dB max −77 dB typ Peak Harmonic or Spurious Noise (SFDR)3 −80 dB typ Intermodulation Distortion (IMD) Second-Order Terms −81 dB typ fa = 1 MHz, fb = 0.97 MHz Third-Order Terms −81 dB typ fa = 1 MHz, fb = 0.97 MHz Aperture Delay 5 ns typ Aperture Jitter 18 ps typ Full Power Bandwidth 74 MHz typ @ 3 dB 10 MHz typ @ 0.1 dB Power Supply Rejection Ratio (PSRR) 82 dB typ DC ACCURACY Resolution 10 Bits Integral Nonlinearity3 ±0.5 LSB max Differential Nonlinearity3 ±0.5 LSB max Guaranteed no missed codes to 10 bits Offset Error3 ±1 LSB max Gain Error3 ±1.5 LSB max Total Unadjusted Error (TUE)3 ±2.5 LSB max ANALOG INPUT Input Voltage Range 0 to VREF V DC Leakage Current ±1 μA max −40°C to +85°C ±5.5 μA max 85°C to 125°C Input Capacitance 42 pF typ When in track 10 pF typ When in hold REFERENCE INPUT VREF Input Voltage Range 1.4 to VDD V min/V max DC leakage Current ±1 μA max Input Capacitance 20 pF typ Input Impedance 32 Ω typ LOGIC INPUTS Input High Voltage, VINH 1.7 V min 2.35 V ≤ VDD ≤ 2.7 V 2 V min 2.7 V < VDD ≤ 3.6 V Input Low Voltage, VIN 0.7 V max 2.35 V ≤ VDD< 2.7 V 0.8 V max 2.7 V ≤ VDD ≤ 3.6 V Input Current, IIN ±1 μA max Typically 10 nA, VIN = 0 V or VDD Input Capacitance, C 4 IN 2 pF max LOGIC OUTPUTS Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 μA; VDD = 2.35 V to 3.6 V Output Low Voltage, VOL 0.2 V max ISINK = 200 μA Floating-State Leakage Current ±2.5 μA max Floating-State Output Capacitance4 4.5 pF max Output Coding Straight (natural) binary CONVERSION RATE Conversion Time 250 ns max 12 SCLK cycles with SCLK at 48 MHz Track-and-Hold Acquisition Time3 60 ns max Throughput Rate 3.45 MSPS max See the Serial Interface section Rev. 0 | Page 5 of 28 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS AD7274 SPECIFICATIONS AD7273 SPECIFICATIONS TIMING SPECIFICATIONS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS MODES OF OPERATION NORMAL MODE PARTIAL POWER-DOWN MODE FULL POWER-DOWN MODE POWER-UP TIMES POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7273/AD7274 to ADSP-BF53x APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING THE AD7273/AD7274 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE