Datasheet AD7762 (Analog Devices) - 5

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AD7762 Data Sheet Parameter Test Conditions/Comments Specification Unit
REFERENCE INPUT/OUTPUT VREF Input Voltage VDD3 = 3.3 V ± 5% +2.5 V max VDD3 = 5 V ± 5% +4.096 V max VREF Input DC Leakage Current ±6 µA max VREF Input Capacitance 5 pF max POWER DISSIPATION Total Power Dissipation Normal mode 958 mW max Low power mode 661 mW max Standby Mode Clock stopped 6.35 mW max POWER REQUIREMENTS AVDD1 (Modulator Supply) ±5% +2.5 V AVDD2 (General Supply) ±5% +5 V AVDD3 (Diff Amp Supply) +3.15/+5.25 V min/max AVDD4 (Ref Buffer Supply) +3.15/+5.25 V min/max DVDD ±5% +2.5 V VDRIVE +1.65/+2.7 V min/max Normal Mode AIDD1 (Modulator) 49/51 mA typ/max AIDD2 (General) 40/42 mA typ/max AIDD4 (Reference Buffer) AVDD4 = 5 V 34/36 mA typ/max Low Power Mode AIDD1 (Modulator) 26/28 mA typ/max AIDD2 (General) 20/23 mA typ/max AIDD4 (Reference Buffer) AVDD4 = 5 V 9/10 mA typ/max AIDD3 (Diff Amp) AVDD3 = 5 V, both modes 41/44 mA typ/max DIDD Both modes 63/70 mA typ/max DIGITAL I/O MCLK Input Amplitude3 5 V typ Input Capacitance 7.3 pF typ Input Leakage Current ±5 μA max Three-State Leakage Current (D15:D0) ±5 μA max VINH 0.7 × VDRIVE V min VINL 0.3 × VDRIVE V max V 4 OH 1.5 V min V 4 OL 0.1 V max 1 See the Terminology section. 2 SNR specifications in dBs are referred to a full-scale input, FS. Tested with an input signal at 0.5 dB below full scale, unless otherwise specified. 3 While the AD7762 can function with an MCLK amplitude of less than 5 V, this is the recommended amplitude to achieve the performance as stated. 4 Tested with a 400 µA load current. Rev. A | Page 4 of 28 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Theory of Operation AD7762 Interface Reading Data Sharing the Parallel Bus Writing to the AD7762 Reading Status and Other Registers Clocking the AD7762 Example 1 Example 2 Driving the AD7762 Using the AD7762 Bias Resistor Selection Decoupling and Layout Recommendations Supply Decoupling Additional Decoupling Reference Voltage Filtering Differential Amplifier Components Layout Considerations Programmable FIR Filter Downloading a User-Defined Filter Example Filter Download AD7762 Registers Control Register 1—Reg 0x0001 Default Value 0x001A Control Register 2—Address 0x0002 Default Value 0x009B Status Register (Read Only) Offset Register—Address 0x0003 Non-bitmapped, Default Value 0x0000 Gain Register—Address 0x0004 Non-bitmapped, Default Value 0xA000 Overrange Register—Address 0x0005 Non-bitmapped, Default Value 0xCCCC Outline Dimensions Ordering Guide