link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 AD7643SPECIFICATIONS AVDD = DVDD = 2.5 V; OVDD = 2.3 V to 3.6 V; VREF = 2.5 V; all specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter ConditionsMinTypMaxUnit RESOLUTION 18 Bits ANALOG INPUT Voltage Range VIN+ − VIN− −VREF +VREF V Operating Input Voltage VIN+, VIN− to AGND −0.1 AVDD1 V Analog Input CMRR fIN = 100 kHz 58 dB Input Current 1.25 MSPS throughput 2.5 μA Input Impedance2 THROUGHPUT SPEED Complete Cycle 800 ns Throughput Rate 1.25 MSPS DC ACCURACY Integral Linearity Error3 −3 ±1.5 +3 LSB4 No Missing Codes 18 Bits Differential Linearity Error −1 +1.25 LSB Transition Noise VREF = 2.5 V 1.7 LSB VREF = 2.048 V 2.0 LSB Zero Error, T 5 MIN to TMAX −16 +16 LSB Zero Error Temperature Drift ±1 ppm/°C Gain Error, T 5 MIN to TMAX −22 +22 LSB Gain Error Temperature Drift ±1 ppm/°C Power Supply Sensitivity AVDD = 2.5 V ± 5% ±16 LSB AC ACCURACY Dynamic Range VREF = 2.5 V 95 dB6 Signal-to-Noise fIN = 1 kHz, VREF = 2.5 V 93.5 dB fIN = 20 kHz, VREF = 2.5 V 93.5 dB fIN = 20 kHz, VREF = 2.048 V 92 dB fIN = 100 kHz, VREF = 2.5 V 93 dB Spurious-Free Dynamic Range fIN = 1 kHz, VREF = 2.5 V 118 dB fIN = 20 kHz, VREF = 2.5 V 114 dB fIN = 20 kHz, VREF = 2.048 V 111 dB fIN = 100 kHz, VREF = 2.5 V 108 dB Total Harmonic Distortion fIN = 1 kHz, VREF = 2.5 V −114 dB fIN = 20 kHz, VREF = 2.5 V −113 dB fIN = 20 kHz, VREF = 2.048 V −109 dB fIN = 100 kHz, VREF = 2.5 V −105 dB Signal-to-(Noise + Distortion) fIN = 1 kHz, VREF = 2.5 V 93.5 dB fIN = 20 kHz, VREF = 2.5 V 93.5 dB fIN = 20 kHz, VREF = 2.048 V 91.8 dB fIN = 100 kHz, VREF = 2.5 V 92.5 dB −3 dB Input Bandwidth 50 MHz SAMPLING DYNAMICS Aperture Delay 1 ns Aperture Jitter 5 ps rms Transient Response Full-scale step 250 ns INTERNAL REFERENCE PDREF = PDBUF = low Output Voltage REF @ 25°C 2.038 2.048 2.058 V Temperature Drift −40°C to +85°C ±8 ppm/°C Line Regulation AVDD = 2.5 V ± 5% ±15 ppm/V Rev. 0 | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION CIRCUIT INFORMATION CONVERTER OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS MULTIPLEXED INPUTS DRIVER AMPLIFIER CHOICE Single-to-Differential Driver VOLTAGE REFERENCE INPUT Internal Reference (PDBUF = Low, PDREF = Low) External 1.2 V Reference and Internal Buffer (PDBUF = Low, PDREF = High) External 2.5 V Reference (PDBUF = High, PDREF = High) Reference Decoupling Temperature Sensor POWER SUPPLY Power Sequencing Power-Up CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 16-Bit and 8-Bit Interface (Master or Slave) SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Conversion External Clock Data Read During Previous Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS LAYOUT EVALUATING THE AD7643 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE