Datasheet AD9233 (Analog Devices) - 2

AD9233* PRODUCT PAGE QUICK LINKS Last Content Update: 09/27/2017 COMPARABLE PARTS TOOLS AND SIMULATIONS
View a parametric search of comparable parts. • Visual Analog • AD9233 IBIS Models
EVALUATION KITS
• AD9233 Evaluation Board
REFERENCE MATERIALS Technical Articles DOCUMENTATION
• Improve The Design Of Your Passive Wideband ADC
Application Notes
Front-End Network • AN-1142: Techniques for High Speed ADC PCB Layout • Matching An ADC To A Transformer • AN-282: Fundamentals of Sampled Data Systems • AN-345: Grounding for Low-and-High-Frequency Circuits
DESIGN RESOURCES
• AN-501: Aperture Uncertainty and ADC System • AD9233 Material Declaration Performance • PCN-PDN Information • AN-715: A First Approach to IBIS Models: What They Are • Quality And Reliability and How They Are Generated • Symbols and Footprints • AN-737: How ADIsimADC Models an ADC • AN-741: Little Known Characteristics of Phase Noise
DISCUSSIONS
• AN-742: Frequency Domain Response of Switched- View all AD9233 EngineerZone Discussions. Capacitor ADCs • AN-756: Sampled Systems and the Effects of Clock Phase
SAMPLE AND BUY
Noise and Jitter Visit the product page to see pricing options. • AN-807: Multicarrier WCDMA Feasibility • AN-808: Multicarrier CDMA2000 Feasibility
TECHNICAL SUPPORT
• AN-812: MicroController-Based Serial Port Interface (SPI) Submit a technical question or find your regional support Boot Circuit number. • AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs
DOCUMENT FEEDBACK
• AN-835: Understanding High Speed ADC Testing and Evaluation Submit feedback for this data sheet. • AN-851: A WiMax Double Downconversion IF Sampling Receiver Design • AN-878: High Speed ADC SPI Control Software • AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual • AN-935: Designing an ADC Transformer-Coupled Front End
Data Sheet
• AD9233: 12-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-DIgital Converter Data Sheet
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUT CONSIDERATIONS Input Common Mode Differential Input Configurations Single-Ended Input Configuration VOLTAGE REFERENCE Internal Reference Connection External Reference Operation CLOCK INPUT CONSIDERATIONS Clock Input Options Clock Duty Cycle JITTER CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE Power-Down Mode Standby Mode DIGITAL OUTPUTS Out-of-Range (OR) Condition Digital Output Enable Function (OEB) TIMING Data Clock Output (DCO) SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI MEMORY MAP READING THE MEMORY MAP TABLE Open Locations Default Values Logic Levels SPI-Accessible Features LAYOUT CONSIDERATIONS POWER AND GROUND RECOMMENDATIONS Exposed Paddle Thermal Heat Slug Recommendations CML RBIAS REFERENCE DECOUPLING EVALUATION BOARD POWER SUPPLIES INPUT SIGNALS OUTPUT SIGNALS DEFAULT OPERATION AND JUMPER SELECTION SETTINGS POWER VIN VREF RBIAS CLOCK PDWN CSB SCLK/DFS SDIO/DCS ALTERNATIVE CLOCK CONFIGURATIONS ALTERNATIVE ANALOG INPUT DRIVE CONFIGURATION SCHEMATICS EVALUATION BOARD LAYOUTS BILL OF MATERIALS (BOM) OUTLINE DIMENSIONS ORDERING GUIDE