Data SheetAD9287REVISION HISTORY1/15—Rev. E to Rev. F Change to Figure 15 Caption ... 14 Changes to Figure 2... 8 Changes to Figure 29 .. 16 Changes to Figure 4... 9 Changes to Figure 41 .. 19 Changes to Clock Duty Cycle Considerations Section .. 20 12/11—Rev. D to Rev. E Changes to Power Dissipation and Power-Down Mode Section ... 21 Changes to Output Signals Section and Figure 60 .. 35 Changes to Figure 50 to Figure 52 Captions ... 23 Change to Default Operation and Jumper Selection Settings Change to Table 8 .. 23 Section .. 36 Changes to Table 9 Endnote .. 24 Changes to Figure 63 .. 39 Changes to Digital Outputs and Timing Section .. 25 Added Endnote 2 in Ordering Guide ... 51 Added Table 10 .. 25 Changes to RBIAS Pin Section .. 26 4/10—Rev. C to Rev. D Deleted Figure 53 and Figure 54 ... 26 Changes to Table 16 .. 33 Changes to Figure 56 .. 27 Updated Outline Dimensions .. 51 Changes to Hardware Interface Section ... 28 Changes to Ordering Guide ... 51 Added Figure 57 .. 29 Changes to Table 15 .. 29 1/10—Rev. B to Rev. C Changes to Reading the Memory Map Table Section .. 30 Updated Outline Dimensions .. 51 Changes to Output Signals Section... 34 Changes to Ordering Guide ... 52 Changes to Figure 60 .. 34 Changes to Default Operation and 7/07—Rev. A to Rev. B Jumper Selection Settings Section .. 35 Changes to Figure 2 and Figure 4 .. 7 Changes to Alternative Analog Input Drive Changes to Table 17 .. 48 Configuration Section .. 36 Changes to Figure 63 .. 38 5/07—Rev. 0 to Rev. A Changes to Table 17 .. 46 Changes to Logic Output (SDIO/ODM) .. 5 Changes to Ordering Guide ... 50 Change to Pipeline Latency ... 6 Added Endnote 2 to Table 4 ... 6 7/06—Revision 0: Initial Version Changes to Figure 2 to Figure 4 ... 7 Changes to Figure 10 .. 12 Rev. F | Page 3 of 51 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL IMPEDANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUT CONSIDERATIONS Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT CONSIDERATIONS Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Digital Outputs and Timing SDIO/ODM Pin SCLK/DTP Pin CSB Pin RBIAS Pin Voltage Reference Internal Reference Operation External Reference Operation SERIAL PORT INTERFACE (SPI) HARDWARE INTERFACE MEMORY MAP READING THE MEMORY MAP TABLE RESERVED LOCATIONS DEFAULT VALUES LOGIC LEVELS Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations EVALUATION BOARD POWER SUPPLIES INPUT SIGNALS OUTPUT SIGNALS DEFAULT OPERATION AND JUMPER SELECTION SETTINGS ALTERNATIVE ANALOG INPUT DRIVE CONFIGURATION OUTLINE DIMENSIONS ORDERING GUIDE