Datasheet AD7610 (Analog Devices)

16-Bit, 250 kSPS, Unipolar/Bipolar Programmable Input PulSAR® ADC Data Sheet AD7610 FEATURES FUNCTIONAL BLOCK DIAGRAM Multiple pins/software programmable input ranges: TEMP REFBUFIN REF REFGND VCC VEE DVDD DGND 5 V, 10 V, ±5 V, ±10 V OVDD Pins or serial SPI®-compatible input ranges/mode selection AGND AD7610 REF OGND Throughput: 250 kSPS AVDD AMP SERIAL 16-bit resolution with no missing codes PDREF REF DATAPORT PDBUF SERIAL INL: ±0.75 LSB typ, ±1.5 LSB max (±23 ppm of FSR) CONFIGURATION IN+ PORT 16 SNR: 94 dB @ 2 kHz SWITCHED D[15:0] CAP DAC IN– i CMOS® process technology SER/PAR BYTESWAP 5 V internal reference: typical drift 3 ppm/°C; PARALLEL OB/2C On-chip temperature sensor CLOCK INTERFACE CNVST BUSY No pipeline delay (SAR architecture) PD CONTROL LOGIC AND RD CALIBRATION CIRCUITRY Parallel (16- or 8-bit bus) and serial 5 V/3.3 V interface RESET CS SPI-/QSPI™-/MICROWIRE™-/DSP-compatible
001
Power dissipation BIPOLAR TEN
06395-
90 mW @ 250 kSPS
Figure 1.
10 mW @ 1 kSPS 48-lead LQFP and LFCSP (7 mm × 7 mm) packages APPLICATIONS Process control Medical instruments High speed data acquisition Digital signal processing Instrumentation Spectrum analysis ATE GENERAL DESCRIPTION Table 1. 48-Lead 14-/16-/18-Bit PulSAR Selection
The AD7610 is a 16-bit charge redistribution successive approxi-
100 kSPS to 500 kSPS to 800 kSPS to >1000
mation register (SAR), architecture analog-to-digital converter
Type 250 kSPS 570 kSPS 1000 kSPS kSPS
(ADC) fabricated on Analog Devices, Inc.’s iCMOS high voltage Pseudo AD7651 AD7650 AD7653 process. The device is configured through hardware or via a Differential AD7660 AD7652 AD7667 AD7661 AD7664 dedicated write only serial configuration port for input range AD7666 and operating mode. The AD7610 contains a high speed 16-bit True Bipolar AD7610 AD7665 AD7612 sampling ADC, an internal conversion clock, an internal reference AD7663 AD7671 (and buffer), error correction circuits, and both serial and parallel AD7951 system interface ports. A falling edge on CNVST samples the True AD7675 AD7676 AD7677 AD7621 Differential AD7622 analog input on IN+ with respect to a ground sense, IN−. The AD7623 AD7610 features four different analog input ranges: 0 V to 5 V, 0 V 18-Bit, True AD7678 AD7679 AD7674 AD7641 to 10 V, ±5 V, and ±10 V. Power consumption is scaled linearly Differential AD7643 with throughput. The device is available in Pb-free 48-lead, low- Multichannel/ AD7654 Simultaneous AD7655 profile quad flat package (LQFP) and a lead frame chip-scale (LFCSP_VQ) package. Operation is specified from −40°C to +85°C.
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Document Outline Features Functional Block Diagram Applications General Description Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Overview Converter Operation Transfer Functions Typical Connection Diagram Analog Inputs Input Range Selection Input Structure Voltage Reference Input/Output Internal Reference (REF = 5 V) (PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V) (PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor Power Supplies Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down Conversion Control Interfaces Digital Interface RESET Parallel Interface Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) Serial Interface Data Interface Master Serial Interface Internal Clock (SER/ = High, EXT/ = Low) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) Read During Convert (RDC = High) Slave Serial Interface External Clock (SER/ = High, EXT/ = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion Hardware Configuration Software Configuration Microprocessor Interfacing SPI Interface Application Information Layout Guidelines Evaluating Performance Outline Dimensions Ordering Guide