Datasheet AD7766 (Analog Devices)

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24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs AD7766 FEATURES GENERAL DESCRIPTION Oversampled successive approximation (SAR) architecture
The AD7766/AD7766-1/AD7766-2 are high performance,
High performance ac and dc accuracy, low power
24-bit, oversampled SAR analog-to-digital converters (ADCs).
115.5 dB dynamic range, 32 kSPS (AD7766-2)
The AD7766/AD7766-1/AD7766-2 combine the benefits of a
112.5 dB dynamic range, 64 kSPS (AD7766-1)
large dynamic range and input bandwidth, consuming 15 mW,
109.5 dB dynamic range, 128 kSPS (AD7766)
10.5 mW, and 8.5 mW power, respectively, and are contained in
−112 dB THD
a 16-lead TSSOP package.
Exceptionally low power
Ideal for ultralow power data acquisition (such as PCI- and USB-
8.5 mW, 32 kSPS (AD7766-2)
based systems), the AD7766/AD7766-1/AD7766-2 provide 24-bit
10.5 mW, 64 kSPS (AD7766-1)
resolution. The combination of exceptional SNR, wide dynamic
15 mW, 128 kSPS (AD7766)
range, and outstanding dc accuracy make the AD7766/AD7766-1/
High dc accuracy
AD7766-2 ideally suited for measuring small signal changes over a
24 bits, no missing codes (NMC)
wide dynamic range. This is particularly suitable for applications
INL: ±6 ppm (typical), ±15 ppm (maximum)
where small changes on the input are measured on larger ac or
Low temperature drift
dc signals. In such an application, the AD7766/AD7766-1/
Zero error drift: 15 nV/°C
AD7766-2 accurately gather both ac and dc information.
Gain error drift: 0.4 ppm/°C On-chip low-pass FIR filter
The AD7766/AD7766-1/AD7766-2 include an on-board digital
Linear phase response
filter (complete with linear phase response) that acts to elimi-
Pass-band ripple: ±0.005 dB
nate out-of-band noise by filtering the oversampled input voltage.
Stop-band attenuation: 100 dB
The oversampled architecture also reduces front-end antialias
2.5 V supply with 1.8 V/2.5 V/3 V/3.6 V logic interface options
requirements. Other features of the AD7766/AD7766-1/AD7766-2
Flexible interfacing options
include a SYNC/PD (synchronization/power-down) pin, allowing
Synchronization of multiple devices
the synchronization of multiple AD7766/AD7766-1/AD7766-2
Daisy-chain capability
devices. The addition of an SDI pin provides the option of daisy
Power-down function
chaining multiple AD7766/AD7766-1/AD7766-2 devices.
Temperature range: −40°C to +105°C
The AD7766/AD7766-1/AD7766-2 operate from a 2.5 V supply
APPLICATIONS
using a 5 V reference. The devices operate from −40°C to +105°C.
Low power PCI/USB data acquisition systems RELATED DEVICES Low power wireless acquisition systems Table 1. 24-Bit ADCs Vibration analysis Instrumentation Part No. Description High precision medical acquisition
AD7760 2.5 MSPS, 100 dB dynamic range,1 on-board differential amp and reference buffer, parallel, variable decimation
FUNCTIONAL BLOCK DIAGRAM
AD7762/ 625 kSPS, 109 dB dynamic range,1 on-board differential
AV
AD7763 amp and reference buffer, parallel/serial, variable
DD AGND MCLK DVDD VDRIVE DGND
decimation
VREF+
AD7764 312 kSPS, 109 dB dynamic range,1 on-board differential
V
amp and reference buffer, variable decimation (pin)
IN+ SUCCESSIVE DIGITAL
AD7765 156 kSPS, 112 dB dynamic range,1 on-board differential
APPROXIMATION FIR FILTER ADC
amp and reference buffer, variable decimation (pin)
V SYNC/PD IN–
AD7767 128 kSPS, 109.5 dB,1 15 mW, 18-bit INL, serial interface
SERIAL INTERFACE REFGND AND CS
AD7767-1 64 kSPS 112.5 dB,1 10.5 mW, 18-bit INL, serial interface
CONTROL LOGIC AD7766/
AD7767-2 32 kSPS, 115.5 dB,1 8.5 mW, 18-bit INL, serial interface
AD7766-1/ AD7766-2
1 1 00 Dynamic range at maximum output data rate. 9-
SCLK DRDY SDO SDI
44 06 Figure 1.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION RELATED DEVICES TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION AD7766/AD7766-1/AD7766-2 TRANSFER FUNCTION CONVERTER OPERATION ANALOG INPUT STRUCTURE SUPPLY AND REFERENCE VOLTAGES AD7766/AD7766-1/AD77662-2 INTERFACE INITIAL POWER-UP READING DATA POWER-DOWN, RESET, AND SYNCHRONIZATION DAISY CHAINING READING DATA IN DAISY-CHAIN MODE CHOOSING THE SCLK FREQUENCY DAISY-CHAIN MODE CONFIGURATION AND TIMING DIAGRAMS DRIVING THE AD7766/AD7766-1/AD7766-2 DIFFERENTIAL SIGNAL SOURCE SINGLE-ENDED SIGNAL SOURCE ANTIALIASING POWER DISSIPATION VREF+ INPUT SIGNAL MULTIPLEXING ANALOG INPUT CHANNELS OUTLINE DIMENSIONS ORDERING GUIDE