Datasheet AD7682, AD7689 (Analog Devices) - 3
| Fabricante | Analog Devices |
| Descripción | 16-Bit, 8-Channel,250 kSPS PulSAR ADC |
| Páginas / Página | 35 / 3 — Data Sheet. AD7682/AD7689. 9/2011—Rev. B to Rev. C. 6/2009—Rev. A to Rev. … |
| Revisión | H |
| Formato / tamaño de archivo | PDF / 754 Kb |
| Idioma del documento | Inglés |
Data Sheet. AD7682/AD7689. 9/2011—Rev. B to Rev. C. 6/2009—Rev. A to Rev. B. 3/2009—Rev. 0 to Rev. A
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Data Sheet AD7682/AD7689 9/2011—Rev. B to Rev. C
Changes to Figure 26 and Figure 27 ... 17 Changes to Internal Reference Section .. 21 Changes to Bipolar Single Supply Section and Analog Inputs Changes to the External Reference and Internal Buffer Section .. 18 Section .. 22 Changes to Internal Reference/Temperature Sensor Section .. 20 Changes to the External Reference/Temperature Sensor Added Figure 31; Renumbered Sequentially ... 20 Section .. 22 Changes to External Reference and Internal Buffer Section and Changes to Table 10, REF Bit Description ... 25 External Reference Section .. 21 Added Figure 32 and Figure 33 ... 21
6/2009—Rev. A to Rev. B
Changes to Power Supply Section ... 22 Changes Table 6 ... 8 Changes to Digital Interface Section, Reading/Writing After Changes to Figure 37 .. 25 Conversion, Any Speed Hosts Section, and Configuration Changes to Figure 38 .. 26 Register, CFG Section ... 23 Changes to Table 10 .. 24
3/2009—Rev. 0 to Rev. A
Added General Timing Without a Busy Indicator Section and Changes to Features Section, Applications Section, and Figure 37 ... 25 Figure 1 ... 1 Added General Timing With a Busy Indicator Section and Added Table 2; Renumbered Sequential y ... 3 Figure 38 ... 26 Changed VREF to VREF ... 4 Added Channel Sequencer Section and Figure 39 ... 27 Changes to Table 3 .. 5 Changes to Read/Write Spanning Conversion Without a Busy Changes to Table 4 .. 6 Indicator Section and Figure 41 .. 28 Changes to Table 5 .. 7 Changes to Read/Write Spanning Conversion with a Busy Deleted Endnote 2 in Table 6 ... 8 Indicator and Figure 43 .. 29 Changes to Figure 4, Figure 5, and Table 7 .. 9 Changes to Evaluating AD7682/AD7689 Performance Changes to Figure 6, Figure 9, and Figure 10 .. 11 Section .. 30 Changes to Figure 22 .. 13 Added Exposed Pad Notation to Outline Dimensions .. 31 Changes to Overview Section and Converter Operation Changes to Ordering Guide ... 31 Section .. 15 Changes to Table 8 .. 16
5/2008—Revision 0: Initial Version
Rev. H | Page 3 of 35 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Overview Converter Operation Transfer Functions Typical Connection Diagrams Unipolar or Bipolar Bipolar Single Supply Analog Inputs Input Structure Selectable Low-Pass Filter Input Configurations Sequencer Source Resistance Driver Amplifier Choice Voltage Reference Output/Input Internal Reference/Temperature Sensor External Reference and Internal Buffer External Reference Reference Decoupling Power Supply Supplying the ADC from the Reference Digital Interface Reading/Writing During Conversion, Fast Hosts Reading/Writing After Conversion, Any Speed Hosts Reading/Writing Spanning Conversion, Any Speed Host Configuration Register, CFG General Timing Without a Busy Indicator General Timing with a Busy Indicator Channel Sequencer Examples Read/Write Spanning Conversion Without a Busy Indicator Read/Write Spanning Conversion with a Busy Indicator Applications Information Layout Evaluating the AD7682/AD7689 Performance Outline Dimensions Ordering Guide
Changes to Figure 26 and Figure 27 ... 17 Changes to Internal Reference Section .. 21 Changes to Bipolar Single Supply Section and Analog Inputs Changes to the External Reference and Internal Buffer Section .. 18 Section .. 22 Changes to Internal Reference/Temperature Sensor Section .. 20 Changes to the External Reference/Temperature Sensor Added Figure 31; Renumbered Sequentially ... 20 Section .. 22 Changes to External Reference and Internal Buffer Section and Changes to Table 10, REF Bit Description ... 25 External Reference Section .. 21 Added Figure 32 and Figure 33 ... 21
6/2009—Rev. A to Rev. B
Changes to Power Supply Section ... 22 Changes Table 6 ... 8 Changes to Digital Interface Section, Reading/Writing After Changes to Figure 37 .. 25 Conversion, Any Speed Hosts Section, and Configuration Changes to Figure 38 .. 26 Register, CFG Section ... 23 Changes to Table 10 .. 24
3/2009—Rev. 0 to Rev. A
Added General Timing Without a Busy Indicator Section and Changes to Features Section, Applications Section, and Figure 37 ... 25 Figure 1 ... 1 Added General Timing With a Busy Indicator Section and Added Table 2; Renumbered Sequential y ... 3 Figure 38 ... 26 Changed VREF to VREF ... 4 Added Channel Sequencer Section and Figure 39 ... 27 Changes to Table 3 .. 5 Changes to Read/Write Spanning Conversion Without a Busy Changes to Table 4 .. 6 Indicator Section and Figure 41 .. 28 Changes to Table 5 .. 7 Changes to Read/Write Spanning Conversion with a Busy Deleted Endnote 2 in Table 6 ... 8 Indicator and Figure 43 .. 29 Changes to Figure 4, Figure 5, and Table 7 .. 9 Changes to Evaluating AD7682/AD7689 Performance Changes to Figure 6, Figure 9, and Figure 10 .. 11 Section .. 30 Changes to Figure 22 .. 13 Added Exposed Pad Notation to Outline Dimensions .. 31 Changes to Overview Section and Converter Operation Changes to Ordering Guide ... 31 Section .. 15 Changes to Table 8 .. 16
5/2008—Revision 0: Initial Version
Rev. H | Page 3 of 35 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Overview Converter Operation Transfer Functions Typical Connection Diagrams Unipolar or Bipolar Bipolar Single Supply Analog Inputs Input Structure Selectable Low-Pass Filter Input Configurations Sequencer Source Resistance Driver Amplifier Choice Voltage Reference Output/Input Internal Reference/Temperature Sensor External Reference and Internal Buffer External Reference Reference Decoupling Power Supply Supplying the ADC from the Reference Digital Interface Reading/Writing During Conversion, Fast Hosts Reading/Writing After Conversion, Any Speed Hosts Reading/Writing Spanning Conversion, Any Speed Host Configuration Register, CFG General Timing Without a Busy Indicator General Timing with a Busy Indicator Channel Sequencer Examples Read/Write Spanning Conversion Without a Busy Indicator Read/Write Spanning Conversion with a Busy Indicator Applications Information Layout Evaluating the AD7682/AD7689 Performance Outline Dimensions Ordering Guide