Datasheet AD7625 (Analog Devices)

16-Bit, 6 MSPS, PulSAR Differential ADC Data Sheet AD7625 FEATURES FUNCTIONAL BLOCK DIAGRAM REFIN REF VCM Throughput: 6 MSPS SNR: 93 dB 1.2V VIO INL: ±0.45 LSB typical, ±1 LSB maximum ÷2 CLOCK BAND GAP LOGIC DNL: ±0.3 LSB typical, ±0.5 LSB maximum IN+ CAP CNV+, CNV– Power dissipation: 135 mW IN– DAC 32-lead LFCSP (5 mm × 5 mm) D+, D– SERIAL SAR architecture SAR DCO+, DCO– AD7625 LVDS
01
No latency/no pipeline delay CLK+, CLK–
-0 52 76
16-bit resolution with no missing codes
0 Figure 1.
Zero error: ±1.5 LSB Differential input voltage: ±4.096 V GENERAL DESCRIPTION Serial LVDS interface
The AD7625 is a 16-bit, 6 MSPS, charge redistribution successive
Self-clocked mode
approximation register (SAR) based architecture analog-to-digital
Echoed-clock mode
converter (ADC). SAR architecture allows unmatched perfor-
Can use LVDS or CMOS for conversion control (CNV signal)
mance both in noise (93 dB SNR) and in linearity (1 LSB). The
Reference options
AD7625 contains a high speed, 16-bit sampling ADC, an internal
Internal: 4.096 V
conversion clock, and an internal buffered reference. On the
External (1.2 V) buffered to 4.096 V
CNV± rising edge, it samples the voltage difference between the
External: 4.096 V
IN+ and IN− pins. The voltages on these pins swing in opposite
APPLICATIONS
phase between 0 V and REF. The 4.096 V reference voltage, REF, can be generated internally or applied externally.
High dynamic range telecommunications Receivers
All converted results are available on a single LVDS self-clocked
Digital imaging systems
or echoed-clock serial interface, reducing external hardware
High speed data acquisition
connections.
Spectrum analysis
The AD7625 is housed in a 32-lead, 5 mm × 5 mm LFCSP with
Test equipment
operation specified from −40°C to +85°C.
Table 1. Fast PulSAR® ADC Selection Input Type Resolution (Bits) 1 MSPS to <2 MSPS 2 MSPS to 3 MSPS 5 MSPS 6 MSPS 10 MSPS
Differential (Ground Sense) 16 AD7653 AD7985 AD7667 AD7980 AD7983 True Bipolar 16 AD7671 Differential (Antiphase) 16 AD7677 AD7621 AD7625 AD7626 AD7623 AD7622 AD7961 18 AD7643 AD7641 AD7960 AD7982 AD7986 AD7984
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER INFORMATION TRANSFER FUNCTIONS ANALOG INPUTS TYPICAL CONNECTION DIAGRAM DRIVING THE AD7625 Differential Analog Input Source Single-Ended-to-Differential Driver VOLTAGE REFERENCE OPTIONS POWER SUPPLY Power-Up DIGITAL INTERFACE Conversion Control Echoed-Clock Interface Mode Self-Clocked Interface Mode APPLICATIONS INFORMATION LAYOUT, DECOUPLING, AND GROUNDING Exposed Pad VDD1 Supply Routing and Decoupling VIO Supply Decoupling Layout and Decoupling of Pin 25 to Pin 32 OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES