Datasheet AD9634 (Analog Devices) - 10

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Data Sheet AD9634 ABSOLUTE MAXIMUM RATINGS Table 6. THERMAL CHARACTERISTICS Parameter Rating
The exposed paddle must be soldered to the ground plane for the Electrical LFCSP package. Soldering the exposed paddle to the customer AVDD to AGND −0.3 V to +2.0 V board increases the reliability of the solder joints, maximizing DRVDD to AGND −0.3 V to +2.0 V the thermal capability of the package. VIN+, VIN− to AGND −0.3 V to AVDD + 0.2 V
Table 7. Thermal Resistance
CLK+, CLK− to AGND −0.3 V to AVDD + 0.2V
Airflow
VCM to AGND −0.3 V to AVDD + 0.2 V
Package Velocity
CSB to AGND −0.3 V to DRVDD + 0.3 V
Type (m/sec) θ 1, 2 1, 3 1, 4 JA θJC θJB Unit
SCLK to AGND −0.3 V to DRVDD + 0.3 V 32-Lead LFCSP 0 37.1 3.1 20.7 °C/W SDIO to AGND −0.3 V to DRVDD + 0.3 V 5 mm × 5 mm 1.0 32.4 °C/W D0±/D1± through D10±/D11± −0.3 V to DRVDD + 0.3 V (CP-32-12) 2.0 29.1 °C/W to AGND DCO+/DCO− to AGND −0.3 V to DRVDD + 0.3 V 1 Per JEDEC 51-7, plus JEDEC 25-5 2S2P test board. 2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air). OR+/OR− to AGND −0.3 V to DRVDD + 0.3 V 3 Per MIL-Std 883, Method 1012.1. Environmental 4 Per JEDEC JESD51-8 (still air). Operating Temperature Range −40°C to +85°C Typical θ (Ambient) JA is specified for a 4-layer PCB with solid ground plane. As shown in Table 7, airflow increases heat dissipation, which Maximum Junction Temperature 150°C Under Bias reduces θJA. In addition, metal in direct contact with the package Storage Temperature Range −65°C to +125°C leads from metal traces, through holes, ground, and power (Ambient) planes reduces the θJA. Stresses at or above those listed under Absolute Maximum
ESD CAUTION
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B | Page 9 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ADC DC SPECIFICATIONS ADC AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS Timing Diagram TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ADC ARCHITECTURE ANALOG INPUT CONSIDERATIONS Input Common Mode Differential Input Configurations VOLTAGE REFERENCE CLOCK INPUT CONSIDERATIONS Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS Digital Output Enable Function (OEB) Timing Data Clock Output (DCO) ADC OVERRANGE (OR) SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE SPI ACCESSIBLE FEATURES MEMORY MAP READING THE MEMORY MAP REGISTER TABLE Open Locations Default Values Logic Levels Transfer Register Map MEMORY MAP REGISTER TABLE APPLICATIONS INFORMATION DESIGN GUIDELINES Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations VCM SPI Port OUTLINE DIMENSIONS ORDERING GUIDE