Datasheet AD7091R (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | 1 MSPS, Ultralow Power, 12-Bit ADC in 10-Lead LFCSP and MSOP |
| Páginas / Página | 22 / 5 — Data Sheet. AD7091R. SPECIFICATIONS. Table 1. Parameter. Test … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 595 Kb |
| Idioma del documento | Inglés |
Data Sheet. AD7091R. SPECIFICATIONS. Table 1. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit
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Data Sheet AD7091R SPECIFICATIONS
VDD = 2.7 V to 5.25 V, VDRIVE = 1.65 V to 5.25 V, VREF = 2.5 V internal reference, fSAMPLE = 1 MSPS, fSCLK = 50 MHz, TA = −40°C to +125°C, unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE1 fIN = 10 kHz sine wave Signal-to-Noise Ratio (SNR)2 66.5 69 dB fSAMPLE = 500 kSPS 67.0 70 dB Signal-to-Noise-and-Distortion Ratio (SINAD)2 66 69 dB Total Harmonic Distortion (THD)2 −84 −79 dB Spurious Free Dynamic Range (SFDR)2 −85 −78 dB Aperture Delay2 5 ns Aperture Jitter2 40 ps Full Power Bandwidth2 At −3 dB 7.5 MHz At −0.1 dB 1.2 MHz DC ACCURACY Resolution 12 Bits Integral Nonlinearity (INL)2 ±0.8 ±1 LSB Differential Nonlinearity (DNL)2 Guaranteed no missing codes to 12 bits ±0.3 ±0.9 LSB Offset Error2 ±0.6 ±2 LSB Gain Error2 ±0.8 ±3 LSB Total Unadjusted Error (TUE)2 −2 LSB ANALOG INPUT Input Voltage Range 0 VREF V DC Leakage Current ±1 µA Input Capacitance3 During acquisition phase 7 pF Outside acquisition phase 1 pF VOLTAGE REFERENCE INPUT/OUTPUT REFOUT 2.485 2.5 2.525 V REFIN 2.7 VDD V Drift ±4.5 ±25 ppm/°C LOGIC INPUTS Input High Voltage (VINH) 0.7 × VDRIVE V Input Low Voltage (VINL) 0.3 × VDRIVE V Input Current (IIN) Typically 10 nA, VIN = 0 V or VDRIVE ±1 µA Input Capacitance (CIN)3 5 pF LOGIC OUTPUTS Output High Voltage (VOH) ISOURCE = 200 µA VDRIVE − 0.2 V Output Low Voltage (VOL) ISINK = 200 µA 0.4 V Floating State Leakage Current ±1 µA Floating State Output Capacitance3 5 pF Output Coding Straight binary CONVERSION RATE Conversion Time 650 ns Track-and-Hold Acquisition Time2, 3 Full-scale step input 350 ns Throughput Rate 1 MSPS POWER REQUIREMENTS VDD 2.7 5.25 V VDRIVE 1.65 5.25 V IDD VIN = 0 V Normal Mode—Static4 Rev. B | Page 3 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION INTERNAL/EXTERNAL VOLTAGE REFERENCE TYPICAL CONNECTION DIAGRAM ANALOG INPUT MODES OF OPERATION Normal Mode Power-Down Mode POWER CONSUMPTION Normal Mode Normal and Power-Down Mode Combination SERIAL INTERFACE WITH BUSY INDICATOR WITHOUT BUSY INDICATOR SOFTWARE RESET INTERFACING WITH 8-/16-BIT SPI OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD7091R SPECIFICATIONS
VDD = 2.7 V to 5.25 V, VDRIVE = 1.65 V to 5.25 V, VREF = 2.5 V internal reference, fSAMPLE = 1 MSPS, fSCLK = 50 MHz, TA = −40°C to +125°C, unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE1 fIN = 10 kHz sine wave Signal-to-Noise Ratio (SNR)2 66.5 69 dB fSAMPLE = 500 kSPS 67.0 70 dB Signal-to-Noise-and-Distortion Ratio (SINAD)2 66 69 dB Total Harmonic Distortion (THD)2 −84 −79 dB Spurious Free Dynamic Range (SFDR)2 −85 −78 dB Aperture Delay2 5 ns Aperture Jitter2 40 ps Full Power Bandwidth2 At −3 dB 7.5 MHz At −0.1 dB 1.2 MHz DC ACCURACY Resolution 12 Bits Integral Nonlinearity (INL)2 ±0.8 ±1 LSB Differential Nonlinearity (DNL)2 Guaranteed no missing codes to 12 bits ±0.3 ±0.9 LSB Offset Error2 ±0.6 ±2 LSB Gain Error2 ±0.8 ±3 LSB Total Unadjusted Error (TUE)2 −2 LSB ANALOG INPUT Input Voltage Range 0 VREF V DC Leakage Current ±1 µA Input Capacitance3 During acquisition phase 7 pF Outside acquisition phase 1 pF VOLTAGE REFERENCE INPUT/OUTPUT REFOUT 2.485 2.5 2.525 V REFIN 2.7 VDD V Drift ±4.5 ±25 ppm/°C LOGIC INPUTS Input High Voltage (VINH) 0.7 × VDRIVE V Input Low Voltage (VINL) 0.3 × VDRIVE V Input Current (IIN) Typically 10 nA, VIN = 0 V or VDRIVE ±1 µA Input Capacitance (CIN)3 5 pF LOGIC OUTPUTS Output High Voltage (VOH) ISOURCE = 200 µA VDRIVE − 0.2 V Output Low Voltage (VOL) ISINK = 200 µA 0.4 V Floating State Leakage Current ±1 µA Floating State Output Capacitance3 5 pF Output Coding Straight binary CONVERSION RATE Conversion Time 650 ns Track-and-Hold Acquisition Time2, 3 Full-scale step input 350 ns Throughput Rate 1 MSPS POWER REQUIREMENTS VDD 2.7 5.25 V VDRIVE 1.65 5.25 V IDD VIN = 0 V Normal Mode—Static4 Rev. B | Page 3 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION INTERNAL/EXTERNAL VOLTAGE REFERENCE TYPICAL CONNECTION DIAGRAM ANALOG INPUT MODES OF OPERATION Normal Mode Power-Down Mode POWER CONSUMPTION Normal Mode Normal and Power-Down Mode Combination SERIAL INTERFACE WITH BUSY INDICATOR WITHOUT BUSY INDICATOR SOFTWARE RESET INTERFACING WITH 8-/16-BIT SPI OUTLINE DIMENSIONS ORDERING GUIDE