Datasheet AD7902 (Analog Devices) - 6

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Data Sheet AD7902 TIMING SPECIFICATIONS
−40°C to +125°C, VDD = 2.37 V to 2.63 V, VIO = 2.3 V to 5.5 V, unless otherwise stated. See Figure 2 and Figure 3 for load conditions. See Figure 39, Figure 41, Figure 43, Figure 45, Figure 47, Figure 49, and Figure 51 for timing diagrams.
Table 4. Parameter Symbol Min Typ Max Unit
Conversion Time (CNVx Rising Edge to Data Available) t 500 710 ns CONV Acquisition Time t 290 ns ACQ Time Between Conversions t CYC VIOx Above 2.3 V 1000 ns CNVx Pulse Width (CS Mode) t 10 ns CNVH SCKx Period (CS Mode) t SCK VIOx Above 4.5 V 10.5 ns VIOx Above 3 V 12 ns VIOx Above 2.7 V 13 ns VIOx Above 2.3 V 15 ns SCKx Period (Chain mode) t SCK VIOx Above 4.5 V 11.5 ns VIOx Above 3 V 13 ns VIOx Above 2.7 V 14 ns VIOx Above 2.3 V 16 ns SCKx Low Time t 4.5 ns SCKL SCKx High Time t 4.5 ns SCKH SCKx Falling Edge to Data Remains Valid t 3 ns HSDO SCKx Falling Edge to Data Valid Delay t DSDO VIOx Above 4.5 V 9.5 ns VIOx Above 3 V 11 ns VIOx Above 2.7 V 12 ns VIOx Above 2.3 V 14 ns CNVx or SDIx Low to SDOx, D15 (MSB) Valid (CS Mode) t EN VIOx Above 3 V 10 ns VIOx Above 2.3 V 15 ns CNVx or SDIx High or Last SCKx Falling Edge to SDOx High Impedance (CS Mode) t 20 ns DIS SDIx Valid Setup Time from CNVx Rising Edge(CS Mode) t 5 ns SSDICNV SDIx Valid Hold Time from CNVx Rising Edge (CS Mode) t 2 ns HSDICNV SCKx Valid Setup Time from CNVx Rising Edge (Chain Mode) t 5 ns SSCKCNV SCKx Valid Hold Time from CNVx Rising Edge (Chain Mode) t 5 ns HSCKCNV SDIx Valid Setup Time from SCKx Falling Edge (Chain Mode) t 2 ns SSDISCK SDIx Valid Hold Time from SCKx Falling Edge (Chain Mode) t 3 ns HSDISCK SDIx High to SDOx High (Chain Mode with Busy Indicator) t 15 ns DSDOSDI
500µA I Y% VIOx1 OL X% VIOx1 tDELAY tDELAY 2 2 TO SDOx 1.4V VIH VIH 2 2 C V V L IL IL 20pF 1 FOR VIOx ≤ 3.0V, X = 90 AND Y = 10; FOR VIOx > 3.0V, X = 70 AND Y = 30.
002
2
003
500µA I MINIMUM V OH IH AND MAXIMUM VIL USED. SEE SPECIFICATIONS FOR DIGITAL
1756-
INPUTS PARAMETER IN TABLE 3.
1756- 1 1 Figure 2. Load Circuit for Digital Interface Timing Figure 3. Voltage Levels for Timing Rev. B | Page 5 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT POWER SUPPLY DIGITAL INTERFACE CS MODE /CS Mode, 3-Wire Interface Without Busy Indicator /CS Mode, 3-Wire Interface with Busy Indicator /CS Mode, 4-Wire Interface Without Busy Indicator /CS Mode, 4-Wire Interface with Busy Indicator CHAIN MODE Chain Mode Without Busy Indicator Chain Mode with Busy Indicator APPLICATIONS INFORMATION SIMULTANEOUS SAMPLING FUNCTIONAL SAFTEY CONSIDERATIONS LAYOUT EVALUATING PERFORMANCE OF THE AD7902 OUTLINE DIMENSIONS ORDERING GUIDE NOTES