LTC3822 OPERATION (Refer to Functional Diagram)Frequency Selection and Phase-Locked Loop where A is a constant determined by the state of the IPRG (FREQ Pins) pin. Floating the IPRG pin selects A = 1; tying IPRG to VIN selects A = 5/3; tying IPRG to GND selects A = 2/3. The The selection of switching frequency is a tradeoff between maximum value of V effi ciency and component size. Low frequency opera- ITH is typically about 1.98V, so the maximum sense voltage allowed across the external tion increases effi ciency by reducing MOSFET switching N-channel MOSFET is 120mV, 82mV or 200mV for the losses, but requires larger inductance and/or capacitance three respective states of the IPRG pin. to maintain low output ripple voltage. However, once the controller’s duty cycle exceeds 20%, The switching frequency of the LTC3822 is controlled slope compensation begins and effectively reduces the peak via the FREQ pin. The FREQ pin can be fl oated, tied to sense voltage by a scale factor (SF) given by the curve VIN or tied to GND to select 550kHz, 750kHz or 300kHz, in Figure 1. respectively. The peak inductor current is determined by the peak sense Undervoltage Lockout voltage and the on-resistance of the external N-channel To prevent operation of the power supply below safe input MOSFET: voltage levels, an undervoltage lockout is incorporated in ΔVSENSE(MAX) the LTC3822. When the input supply voltage (V I IN) drops PK = R below 2.25V, the external MOSFETs and all internal circuits DS(ON) are turned off except for the undervoltage block, which draws only a few microamperes. Boost Capacitor Refresh Timeout In order to maintain suffi cient charge across CB, the Peak Current Sense Voltage Selection and Slope converter will briefl y turn off the top MOSFET and turn on Compensation (IPRG Pin) the bottom MOSFET if at any time the bottom MOSFET When the LTC3822 controller is operating below 20% duty has remained off for 10 switching cycles. This most cycle, the peak current sense voltage (between the VIN and commonly occurs in a dropout situation. SW pins) allowed across the external top-side MOSFET is determined by: Δ V V ITH – 0.7V SENSE(MAX) = A • 10 110 100 90 80 70 (%) 60 MAX 50 SF = I/I 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) 3822 F01 Figure 1. Maximum Peak Current vs Duty Cycle 3822fa 9