Datasheet LTC3809 (Analog Devices) - 6

LTC3809
PIN FUNCTIONS PLLLPF (Pin 1):
Frequency Set/PLL Lowpass Filter. When
RUN (Pin 5):
Run Control Input. Forcing this pin below synchronizing to an external clock, this pin serves as the 1.1V shuts down the chip. Driving this pin to VIN or releas- lowpass fi lter point for the phase-locked loop. Normally, ing this pin enables the chip to start-up with the internal a series RC is connected between this pin and ground. soft-start. When not synchronizing to an external clock, this pin serves
IPRG (Pin 6):
Three-State Pin to Select Maximum Peak as the frequency select input. Tying this pin to GND selects Sense Voltage Threshold. This pin selects the maximum 300kHz operation; tying this pin to VIN selects 750kHz allowed voltage drop between the VIN and SW pins (i.e., operation. Floating this pin selects 550kHz operation. the maximum allowed drop across the external P-channel MOSFET). Tie to V Connect a 2.2nF capacitor between this pin and GND, and IN, GND or fl oat to select 204mV, 85mV or 125mV respectively. a 1000pF capacitor between this pin and the SYNC/MODE when using spread spectrum modulation operation.
BG (Pin 7):
Bottom (NMOS) Gate Drive Output. This pin drives the gate of the external N-channel MOSFET. This
SYNC/MODE (Pin 2):
This pin performs four functions: pin has an output swing from PGND to V 1) auxiliary winding feedback input, 2) external clock IN. synchronization input for phase-locked loop, 3) Burst
TG (Pin 8):
Top (PMOS) Gate Drive Output. This pin drives Mode, pulse-skipping or forced continuous mode select, the gate of the external P-channel MOSFET. This pin has and 4) enable
spread spectrum
modulation operation in an output swing from PGND to VIN. pulse-skipping mode. Applying a clock with frequency
V
between 250kHz to 750kHz causes the internal oscillator
IN (Pin 9):
Chip Signal Power Supply. This pin powers the entire chip, the gate drivers and serves as the positive to phase-lock to the external clock and disables Burst input to the differential current comparator. Mode operation but allows pulse-skipping at low load currents.
SW (Pin 10):
Switch Node Connection to Inductor. This pin is also the negative input to the differential current To select Burst Mode operation at light loads, tie this comparator and an input to the reverse current comparator. pin to VIN. Grounding this pin selects forced continuous Normally this pin is connected to the drain of the external operation, which allows the inductor current to reverse. P-channel MOSFET, the drain of the external N-channel Tying this pin to VFB selects pulse-skipping mode. In these MOSFET and the inductor. cases, the frequency of the internal oscillator is set by the voltage on the PLLLPF pin. Tying to a voltage between
GND (Pin 11):
Exposed Pad. The Exposed Pad is ground 1.35V to V and must be soldered to the PCB ground for electrical IN – 0.5V enables spread spectrum modulation operation. In this case, an internal 2.6μA pull-down current contact and optimum thermal performance. source helps to set the voltage at this pin by tying a resistor with appropriate value between this pin and VIN.
Do not leave this pin fl oating. VFB (Pin 3):
Feedback Pin. This pin receives the remotely sensed feedback voltage for the controller from an external resistor divider across the output.
ITH (Pin 4):
Current Threshold and Error Amplifi er Compensation Point. Nominal operating range on this pin is from 0.7V to 2V. The voltage on this pin determines the threshold of the main current comparator. 3809fc 6