Datasheet LTC3527, LTC3527-1 (Analog Devices) - 10

LTC3527/LTC3527-1
OPERATION (Refer to Block Diagram)
The LTC3527/LTC3527-1 are dual 1.2MHz/2.2MHz syn- current limiting are provided to each converter indepen- chronous boost converters housed in a 16-lead 3mm × dently during start-up, as well as during normal mode. 3mm QFN package. With the ability to start up and operate When V from inputs less than 880mV, these devices feature fi xed IN, VOUT1, or VOUT2 exceeds 1.4V (typical), the IC enters normal operating mode. Once the higher of V frequency, current mode PWM control for exceptional line OUT1 or V and load regulation. The current mode architecture with OUT2 exceeds VIN by 0.24V, the IC powers itself from the higher V adaptive slope compensation provides excellent transient OUT instead of VIN. At this point the internal circuitry has no dependency on the V load response, requiring minimal output fi ltering. Internal IN input voltage, eliminating the requirement for a large input capacitor. soft-start and loop compensation simplifi es the design The input voltage can drop as low as 0.5V. process while minimizing the number of external com- ponents. Each converter has a separate input supply pin With single-cell operation, the limiting factor for the ap- and is operated independently of the other, but they share plication becomes the availability of the power source to the same oscillator thus providing in-phase switching. supply suffi cient energy to the outputs at low voltages, and If different input supply voltages are used, the third VIN maximum duty cycle, which is clamped at 90% (typical). pin must be wired to the higher of the two supplies and Note that at low input voltages, small voltage drops due each VOUT must be higher than the highest VIN. Bypass to the higher series resistance of a depleted cell become capacitors are recommended on all VIN pins. critical and greatly limit the power delivery capability of With low R the converter. A higher value, low ESR input capacitor can DS(ON) and low gate charge internal N-channel MOSFET switches and P-channel MOSFET synchronous help to improve this to a small degree. rectifi ers, the LTC3527/LTC3527-1 achieve high effi ciency
Low Noise Fixed Frequency Operation
over a wide range of load current. With the MODE pin low, automatic Burst Mode operation maintains high effi ciency Soft-Start: The LTC3527/LTC3527-1 contain internal cir- at very light loads, reducing the quiescent current to just cuitry to provide independent soft-start operation to each 12μA. If MODE is high, fi xed frequency PWM switching converter. The soft-start circuitry ramps the peak inductor provides low voltage ripple on the outputs. Operation can current from zero to its peak value of 900mA (typical) be best understood by referring to the Block Diagram. for converter 1 or 500mA (typical) for converter 2 in ap- A PGOOD signal is provided independently for each con- proximately 0.5ms, allowing start-up into heavy loads. The verter which can be used with the SHDN pins to provide soft-start circuitry for both converters is reset in the event sequencing of the outputs. of a thermal shutdown or shutdown command. The LTC3527-1 provides an instant off feature which Oscillator: An internal oscillator sets the switching fre- discharges V quency to 1.2MHz if the FSEL pin is below 0.35V, or 2.2MHz OUT1 or VOUT2 when their respective SHDN pins go low. if the FSEL pin is above 0.88V. A frequency select function allows for 1.2MHz switching Shutdown: Shutdown is accomplished independently for (FSEL = Low) or 2.2MHz switching (FSEL = High). each converter by pulling its respective SHDN pin below 0.35V, and enabled by pulling each SHDN pin above
Low Voltage Start-Up
0.88V. Note that the SHDN pins can be driven above VIN or V The LTC3527/LTC3527-1 include an independent start-up OUT, as long as it is limited to less than the absolute maximum rating. oscillator designed to start up at an input voltage of 0.7V (typical). The two converters can be started together or Error Amplifier: The noninverting input of each in either sequence of boost 1 and boost 2 with appropri- transconductance error amplifi er is internally connected ate control of SHDN1 and SHDN2. Soft-start and inrush to the 1.20V reference. The inverting inputs are connected 35271fc 10