Datasheet LTC3525D-3.3 (Analog Devices) - 8

LTC3525D-3.3
operaTion
The LTC3525D is a high performance Burst Mode operation in some applications. Therefore, in applications where only, synchronous boost converter requiring only three SHDN may be driven above VIN, a resistor divider or other small external components. Its simplicity and small size means must be employed to keep the SHDN voltage below make it a high efficiency alternative to charge pump designs. (VIN + 0.4V) to prevent the possibility of the test mode It is designed to start up from a single alkaline or nickel being engaged. Please refer to Figure 1 for two possible cell, with input voltages as low as 0.85V, or from two or implementations. three cells (or a Li-Ion battery), with voltages as high as After the SHDN pin rises, there is a short delay before 4.5V. Once started, VIN can be as low as 0.5V (depend- switching starts. The delay is 20µs to 120µs, depending ing on load current) and maintain regulation. The output on input voltage (see Typical Performance Characteristics voltage is preset internally to 3.3V. Peak switch current is curve). 400mA minimum, providing regulation with load currents up to 150mA, depending on input voltage.
Pass-Through Mode
Synchronous rectification provides high efficiency opera- When the LTC3525D is in shutdown, the internal P-channel tion while eliminating the need for an external Schottky MOSFET switch is turned on. This allows V diode. IN to be con- nected to VOUT through the inductor in shutdown, creating The LTC3525D can maintain regulation with an input a pass-through mode. voltage equal to or greater than VOUT. Note, however, that the synchronous rectifier is not enabled in this mode,
Start-up
resulting in lower efficiency and reduced output current A start-up oscillator allows the LTC3525D to start with input capability. voltages as low as 1V. It remains in start-up mode until The operating quiescent current is only 7µA typical, allow- two conditions are met. VOUT must exceed VIN by at least ing the converter to maintain high efficiency at extremely 0.2V typical and either VIN or VOUT must be greater than light loads. 1.8V typical. During start-up, the synchronous rectifier is not enabled,
Shutdown
and the internal P-channel synchronous rectifier acts The LTC3525D is shut down by pulling SHDN below 0.4V, as a follower, causing the peak voltage on SW to reach and made active by raising it above 1V. Although SHDN can (VIN + 1V) typical. This limits inrush current by maintaining be driven above VIN or VOUT (up to the absolute maximum control of the inductor current when VOUT is less than VIN. rating) without damage, the LTC3525D has a proprietary To reduce power dissipation in the P-channel synchronous test mode that may be engaged if SHDN is held in the rectifier when the output is shorted, a foldback feature is range of 0.5V to 1V higher than the greater of VIN or VOUT. incorporated that reduces the peak inductor current when If the test mode is engaged, normal PWM switching ac- VIN is more than 1.7V greater than VOUT. tion is interrupted, which can cause undesirable operation LTC3525D-3.3 VIN LTC3525D-3.3 SHDN SHDN R 3525d33 F01 VCNTRL 1M ZETEX ZC2811E 1M VCNTRL R > (VCNTRL/(VIN + 0.4) – 1) MΩ
Figure 1
3525d33fb 8 For more information www.linear.com/LTC3525D3.3 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Description Revision History Related Parts