Datasheet LTC3400-1 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | 600mA, 1.2MHz Micropower Synchronous Boost Converter in ThinSOT |
| Páginas / Página | 12 / 6 — OPERATIO. APPLICATIO S I FOR ATIO. PCB LAYOUT GUIDELINES. Figure 2. … |
| Formato / tamaño de archivo | PDF / 302 Kb |
| Idioma del documento | Inglés |
OPERATIO. APPLICATIO S I FOR ATIO. PCB LAYOUT GUIDELINES. Figure 2. Maximum Output Current vs
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LTC3400-1
U OPERATIO
above the burst threshold, the LTC3400-1 will resume peak VOUT ripple and input quiescent current during Burst continuous PWM operation seamlessly. Referring to the Mode operation. Typical values for CFF range from 15pF to Block Diagram, an optional capacitor (CFF) between VOUT 220pF. and FB in some circumstances can reduce the peak-to-
U U W U APPLICATIO S I FOR ATIO PCB LAYOUT GUIDELINES
will allow greater output current capability by reducing the inductor ripple current. Increasing the inductance above The high speed operation of the LTC3400-1 demands 10 careful attention to board layout. You will not get adver- µH will increase size while providing little improvement in output current capability. tised performance with careless layout. Figure 1 shows the recommended component placement. A large ground The approximate output current capability of the LTC3400-1 pin copper area will help to lower the chip temperature. A versus inductance value is given in the equation below and multilayer board with a separate ground plane is ideal, but illustrated graphically in Figure 2. not absolutely necessary. V 180 IN =1.2V VOUT = 3V (OPTIONAL) V 160 OUT = 3.3V VOUT = 3.6V 140 1 SW V 6 IN VIN 120 2 GND V 5 OUT VOUT = 5V 110 3 FB SHDN 4 SHDN OUTPUT CURRENT (mA) 80 60 VOUT 3 5 7 9 11 13 15 17 19 21 23 INDUCTANCE (µH) 34001 F02 34001 F03 RECOMMENDED COMPONENT PLACEMENT. TRACES CARRYING HIGH CURRENT ARE DIRECT. TRACE AREA AT
Figure 2. Maximum Output Current vs
FB PIN IS SMALL. LEAD LENGTH TO BATTERY IS SHORT
Inductance Based On 90% Efficiency Figure 1. Recommended Component Placement
⎛ V • D ⎞
for Single Layer Board
I = η I IN – • 1– D OUT MAX ( ) • ⎜ P ⎟ ( ) ⎝ f • L • 2⎠
COMPONENT SELECTION
where:
Inductor Selection
η = estimated efficiency The LTC3400-1 can utilize small surface mount and chip IP = peak current limit value (0.6A) inductors due to its fast 1.2MHz switching frequency. A VIN = input (battery) voltage minimum inductance value of 3.3µH is necessary for 3.6V D = steady-state duty ratio = (V and lower voltage applications and 4.7 OUT – VIN)/VOUT µH for output voltages greater than 3.6V. Larger values of inductance f = switching frequency (1.2MHz typical) L = inductance value 34001f 6
U OPERATIO
above the burst threshold, the LTC3400-1 will resume peak VOUT ripple and input quiescent current during Burst continuous PWM operation seamlessly. Referring to the Mode operation. Typical values for CFF range from 15pF to Block Diagram, an optional capacitor (CFF) between VOUT 220pF. and FB in some circumstances can reduce the peak-to-
U U W U APPLICATIO S I FOR ATIO PCB LAYOUT GUIDELINES
will allow greater output current capability by reducing the inductor ripple current. Increasing the inductance above The high speed operation of the LTC3400-1 demands 10 careful attention to board layout. You will not get adver- µH will increase size while providing little improvement in output current capability. tised performance with careless layout. Figure 1 shows the recommended component placement. A large ground The approximate output current capability of the LTC3400-1 pin copper area will help to lower the chip temperature. A versus inductance value is given in the equation below and multilayer board with a separate ground plane is ideal, but illustrated graphically in Figure 2. not absolutely necessary. V 180 IN =1.2V VOUT = 3V (OPTIONAL) V 160 OUT = 3.3V VOUT = 3.6V 140 1 SW V 6 IN VIN 120 2 GND V 5 OUT VOUT = 5V 110 3 FB SHDN 4 SHDN OUTPUT CURRENT (mA) 80 60 VOUT 3 5 7 9 11 13 15 17 19 21 23 INDUCTANCE (µH) 34001 F02 34001 F03 RECOMMENDED COMPONENT PLACEMENT. TRACES CARRYING HIGH CURRENT ARE DIRECT. TRACE AREA AT
Figure 2. Maximum Output Current vs
FB PIN IS SMALL. LEAD LENGTH TO BATTERY IS SHORT
Inductance Based On 90% Efficiency Figure 1. Recommended Component Placement
⎛ V • D ⎞
for Single Layer Board
I = η I IN – • 1– D OUT MAX ( ) • ⎜ P ⎟ ( ) ⎝ f • L • 2⎠
COMPONENT SELECTION
where:
Inductor Selection
η = estimated efficiency The LTC3400-1 can utilize small surface mount and chip IP = peak current limit value (0.6A) inductors due to its fast 1.2MHz switching frequency. A VIN = input (battery) voltage minimum inductance value of 3.3µH is necessary for 3.6V D = steady-state duty ratio = (V and lower voltage applications and 4.7 OUT – VIN)/VOUT µH for output voltages greater than 3.6V. Larger values of inductance f = switching frequency (1.2MHz typical) L = inductance value 34001f 6