Datasheet LTC1772 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | Constant Frequency Current Mode Step-Down DC/DC Controller in SOT-23 |
| Páginas / Página | 12 / 9 — APPLICATIONS INFORMATION. Low Supply Operation. Efficiency … |
| Formato / tamaño de archivo | PDF / 172 Kb |
| Idioma del documento | Inglés |
APPLICATIONS INFORMATION. Low Supply Operation. Efficiency Considerations. Figure 3. Line Regulation of VREF and VITH
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LTC1772
U U W U APPLICATIONS INFORMATION Low Supply Operation Efficiency Considerations
Although the LTC1772 can function down to approxi- The efficiency of a switching regulator is equal to the mately 2V, the maximum allowable output current is output power divided by the input power times 100%. It is reduced when VIN decreases below 3V. Figure 3 shows the often useful to analyze individual losses to determine what amount of change as the supply is reduced down to 2V. is limiting the efficiency and which change would produce Also shown in Figure 3 is the effect of VIN on VREF as VIN the most improvement. Efficiency can be expressed as: goes below 2.3V. Efficiency = 100% – (η1 + η2 + η3 + ...) 105 where η1, η2, etc. are the individual losses as a percent- VREF age of input power. 100 Although all dissipative elements in the circuit produce 95 VITH losses, four main sources usually account for most of the 90 losses in LTC1772 circuits: 1) LTC1772 DC bias current, 2) MOSFET gate charge current, 3) I2R losses and 4) 85 voltage drop of the output diode. NORMALIZED VOLTAGE (%) 80 1. The VIN current is the DC supply current, given in the electrical characteristics, that excludes MOSFET driver 752.0 2.2 2.4 2.6 2.8 3.0 and control currents. VIN current results in a small loss INPUT VOLTAGE (V) 1772 F03 which increases with VIN.
Figure 3. Line Regulation of VREF and VITH
2. MOSFET gate charge current results from switching the gate capacitance of the power MOSFET. Each time
Setting Output Voltage
a MOSFET gate is switched from low to high to low The LTC1772 develops a 0.8V reference voltage between again, a packet of charge dQ moves from VIN to ground. the feedback (Pin 3) terminal and ground (see Figure 4). By The resulting dQ/dt is a current out of VIN which is selecting resistor R1, a constant current is caused to flow typically much larger than the DC supply current. In through R1 and R2 to set the overall output voltage. The continuous mode, IGATECHG = f(Qp). regulated output voltage is determined by: 3. I2R losses are predicted from the DC resistances of the MOSFET, inductor and current shunt. In continuous ⎛ R2⎞ VOUT = 0 8 . 1+ mode the average output current flows through L but ⎝⎜ R ⎠⎟ 1 is “chopped” between the P-channel MOSFET (in se- ries with R For most applications, an 80k resistor is suggested for R1. SENSE) and the output diode. The MOSFET To prevent stray pickup, locate resistors R1 and R2 close RDS(ON) plus RSENSE multiplied by duty cycle can be to LTC1772. summed with the resistances of L and RSENSE to obtain I2R losses. VOUT R2 4. The output diode is a major source of power loss at LTC1772 3 VFB high currents and gets worse at high input voltages. The diode loss is calculated by multiplying the forward R1 voltage times the diode duty cycle multiplied by the 1772 F04 load current. For example, assuming a duty cycle of
Figure 4. Setting Output Voltage
50% with a Schottky diode forward voltage drop of 1772fb 9
U U W U APPLICATIONS INFORMATION Low Supply Operation Efficiency Considerations
Although the LTC1772 can function down to approxi- The efficiency of a switching regulator is equal to the mately 2V, the maximum allowable output current is output power divided by the input power times 100%. It is reduced when VIN decreases below 3V. Figure 3 shows the often useful to analyze individual losses to determine what amount of change as the supply is reduced down to 2V. is limiting the efficiency and which change would produce Also shown in Figure 3 is the effect of VIN on VREF as VIN the most improvement. Efficiency can be expressed as: goes below 2.3V. Efficiency = 100% – (η1 + η2 + η3 + ...) 105 where η1, η2, etc. are the individual losses as a percent- VREF age of input power. 100 Although all dissipative elements in the circuit produce 95 VITH losses, four main sources usually account for most of the 90 losses in LTC1772 circuits: 1) LTC1772 DC bias current, 2) MOSFET gate charge current, 3) I2R losses and 4) 85 voltage drop of the output diode. NORMALIZED VOLTAGE (%) 80 1. The VIN current is the DC supply current, given in the electrical characteristics, that excludes MOSFET driver 752.0 2.2 2.4 2.6 2.8 3.0 and control currents. VIN current results in a small loss INPUT VOLTAGE (V) 1772 F03 which increases with VIN.
Figure 3. Line Regulation of VREF and VITH
2. MOSFET gate charge current results from switching the gate capacitance of the power MOSFET. Each time
Setting Output Voltage
a MOSFET gate is switched from low to high to low The LTC1772 develops a 0.8V reference voltage between again, a packet of charge dQ moves from VIN to ground. the feedback (Pin 3) terminal and ground (see Figure 4). By The resulting dQ/dt is a current out of VIN which is selecting resistor R1, a constant current is caused to flow typically much larger than the DC supply current. In through R1 and R2 to set the overall output voltage. The continuous mode, IGATECHG = f(Qp). regulated output voltage is determined by: 3. I2R losses are predicted from the DC resistances of the MOSFET, inductor and current shunt. In continuous ⎛ R2⎞ VOUT = 0 8 . 1+ mode the average output current flows through L but ⎝⎜ R ⎠⎟ 1 is “chopped” between the P-channel MOSFET (in se- ries with R For most applications, an 80k resistor is suggested for R1. SENSE) and the output diode. The MOSFET To prevent stray pickup, locate resistors R1 and R2 close RDS(ON) plus RSENSE multiplied by duty cycle can be to LTC1772. summed with the resistances of L and RSENSE to obtain I2R losses. VOUT R2 4. The output diode is a major source of power loss at LTC1772 3 VFB high currents and gets worse at high input voltages. The diode loss is calculated by multiplying the forward R1 voltage times the diode duty cycle multiplied by the 1772 F04 load current. For example, assuming a duty cycle of
Figure 4. Setting Output Voltage
50% with a Schottky diode forward voltage drop of 1772fb 9