Datasheet LT1614 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | Inverting 600kHz Switching Regulator |
| Páginas / Página | 16 / 5 — PIN FUNCTIONS. NFB (Pin 1):. GND (Pin 4):. SW (Pin 5):. IN (Pin 6):. LBI … |
| Formato / tamaño de archivo | PDF / 273 Kb |
| Idioma del documento | Inglés |
PIN FUNCTIONS. NFB (Pin 1):. GND (Pin 4):. SW (Pin 5):. IN (Pin 6):. LBI (Pin 7):. VC (Pin 2):. LBO (Pin 8):. SHDN (Pin 3):
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LT1614
U U U PIN FUNCTIONS NFB (Pin 1):
Negative Feedback Pin. Reference voltage is
GND (Pin 4):
Ground. Connect directly to local ground – 1.24V. Connect resistive divider tap here. The sug- plane. gested value for R2 is 24.9k. Set R1 and R2 according to:
SW (Pin 5):
Switch Pin. Minimize trace area at this pin to | V | – 1 2 . 4 keep EMI down. R OUT 1= 1 2.4 +
V
4 5 . • 10–6
IN (Pin 6):
Supply Pin. Must have 1µF ceramic bypass R2 capacitor right at the pin, connected directly to ground.
LBI (Pin 7):
Low-Battery Detector Input. 200mV refer-
VC (Pin 2):
Compensation Pin for Error Amplifier. Con- ence. Voltage on LBI must stay between ground and nect a series RC from this pin to ground. Typical values 700mV. Float this pin if not used. are 100kΩ and 1nF. Minimize trace area at VC.
LBO (Pin 8):
Low-Battery Detector Output. Open collec-
SHDN (Pin 3):
Shutdown. Ground this pin to turn off tor, can sink 10µA. A 1MΩ pull-up is recommended. Float switcher. Must be tied to VIN (or higher voltage) to enable this pin if not used. The low-battery detector is disabled switcher. Do not float the SHDN pin. when SHDN is low. LBO is high-Z in this state.
W BLOCK DIAGRAM
VIN 6 VIN R5 R6 40k 40k + SHDN VC SHUTDOWN 3 gm 2 – LBI ERROR + 7 + AMPLIFIER LBO Q1 Q2 A1 ×10 ENABLE 8 R3 BIAS – – A4 200mV 30k R4 140k COMPARATOR SW 1 – 5 DRIVER FF RAMP NFB V GENERATOR OUT + R Q Q3 + R1 Σ S (EXTERNAL) + A2 + NFB A = 3 0.15Ω R2 600kHz (EXTERNAL) OSCILLATOR – 4 GND 1614 BD
Figure 2. Block Diagram
5
U U U PIN FUNCTIONS NFB (Pin 1):
Negative Feedback Pin. Reference voltage is
GND (Pin 4):
Ground. Connect directly to local ground – 1.24V. Connect resistive divider tap here. The sug- plane. gested value for R2 is 24.9k. Set R1 and R2 according to:
SW (Pin 5):
Switch Pin. Minimize trace area at this pin to | V | – 1 2 . 4 keep EMI down. R OUT 1= 1 2.4 +
V
4 5 . • 10–6
IN (Pin 6):
Supply Pin. Must have 1µF ceramic bypass R2 capacitor right at the pin, connected directly to ground.
LBI (Pin 7):
Low-Battery Detector Input. 200mV refer-
VC (Pin 2):
Compensation Pin for Error Amplifier. Con- ence. Voltage on LBI must stay between ground and nect a series RC from this pin to ground. Typical values 700mV. Float this pin if not used. are 100kΩ and 1nF. Minimize trace area at VC.
LBO (Pin 8):
Low-Battery Detector Output. Open collec-
SHDN (Pin 3):
Shutdown. Ground this pin to turn off tor, can sink 10µA. A 1MΩ pull-up is recommended. Float switcher. Must be tied to VIN (or higher voltage) to enable this pin if not used. The low-battery detector is disabled switcher. Do not float the SHDN pin. when SHDN is low. LBO is high-Z in this state.
W BLOCK DIAGRAM
VIN 6 VIN R5 R6 40k 40k + SHDN VC SHUTDOWN 3 gm 2 – LBI ERROR + 7 + AMPLIFIER LBO Q1 Q2 A1 ×10 ENABLE 8 R3 BIAS – – A4 200mV 30k R4 140k COMPARATOR SW 1 – 5 DRIVER FF RAMP NFB V GENERATOR OUT + R Q Q3 + R1 Σ S (EXTERNAL) + A2 + NFB A = 3 0.15Ω R2 600kHz (EXTERNAL) OSCILLATOR – 4 GND 1614 BD
Figure 2. Block Diagram
5