Datasheet LTC2498 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | 24-Bit 8-/16-Channel ΔΣ ADC with Easy Drive Input Current Cancellation |
| Páginas / Página | 38 / 5 — Digital. inputs anD Digital outputs The. denotes the specifications which … |
| Formato / tamaño de archivo | PDF / 1.1 Mb |
| Idioma del documento | Inglés |
Digital. inputs anD Digital outputs The. denotes the specifications which apply over the
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LTC2498
Digital inputs anD Digital outputs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fEOSC External Oscillator Frequency Range (Note 16) l 10 1000 kHz tHEO External Oscillator High Period l 0.125 50 µs tLEO External Oscillator Low Period l 0.125 50 µs tCONV_1 Conversion Time for 1x Speed Mode 50Hz Mode l 157.2 160.3 163.5 ms 60Hz Mode l 131 133.6 136.3 ms Simultaneous 50/60Hz Mode l 144.1 146.9 149.9 ms External Oscillator 41036/fEOSC (in kHz) ms tCONV_2 Conversion Time for 2x Speed Mode 50Hz Mode l 78.7 80.3 81.9 ms 60Hz Mode l 65.6 66.9 68.2 ms Simultaneous 50/60Hz Mode l 72.2 73.6 75.1 ms External Oscillator 20556/fEOSC (in kHz) ms fISCK Internal SCK Frequency Internal Oscillator (Note 10) 38.4 kHz External Oscillator (Notes 10, 11) fEOSC/8 kHz DISCK Internal SCK Duty Cycle (Note 10) l 45 55 % fESCK External SCK Frequency Range (Note 10) l 4000 kHz tLESCK External SCK LOW Period (Note 10) l 125 ns tHESCK External SCK High Period (Note 10) l 125 ns tDOUT_ISCK Internal SCK 32-Bit Data Output Time Internal Oscillator l 0.81 0.83 0.85 ms External Oscillator 256/fEOSC (in kHz) ms tDOUT_ESCK External SCK 32-Bit Data Output Time (Note 10) 32/fESCK (in kHz) ms t1 CS↓ to SDO Low l 0 200 ns t2 CS↑ to SDO Hi-Z l 0 200 ns t3 CS↓ to SCK↑ Internal SCK Mode l 0 200 ns t4 CS↓ to SCK↑ External SCK Mode l 50 ns tKQMAX SCK↓ to SDO Valid l 200 ns tKQMIN SDO Hold After SCK↓ (Note 5) l 15 ns t5 SCK Set-Up Before CS↓ l 50 ns t6 SCK Hold After CS↓ l 50 ns t7 SDI Setup Before SCK↑ (Note 5) l 100 ns t8 SDI Hold After SCK↑ (Note 5) l 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings may
Note 10:
The SCK can be configured in external SCK mode or internal SCK cause permanent damage to the device. Exposure to any Absolute Maximum mode. In external SCK mode, the SCK pin is used as a digital input and the Rating condition for extended periods may affect device reliability and lifetime. driving clock is fESCK. In the internal SCK mode, the SCK pin is used as a
Note 2:
All voltage values are with respect to GND. digital output and the output clock signal during the data output is fISCK.
Note 3:
VCC = 2.7V to 5.5V unless otherwise specified.
Note 11:
The external oscillator is connected to the fO pin. The external VREFCM = VREF/2, FS = 0.5VREF oscillator frequency, fEOSC, is expressed in kHz. VIN = IN+ – IN–, VIN(CM) = (IN+ – IN–)/2,
Note 12:
The converter uses its internal oscillator. where IN+ and IN– are the selected input channels.
Note 13:
The output noise includes the contribution of the internal
Note 4:
Use internal conversion clock or external conversion clock source calibration operations. with fEOSC = 307.2kHz unless other wise specified.
Note 14:
Guaranteed by design and test correlation.
Note 5:
Guaranteed by design, not subject to test.
Note 15:
The converter is in external SCK mode of operation such that the
Note 6:
Integral nonlinearity is defined as the deviation of a code from a SCK pin is used as a digital input. The frequency of the clock signal driving straight line passing through the actual endpoints of the transfer curve. The SCK during the data output is fESCK and is expressed in Hz. deviation is measured from the center of the quantization band.
Note 16:
Refer to Applications Information section for performance vs
Note 7:
50Hz mode (internal oscillator) or fEOSC = 256kHz ±2% (external oscillator). data rate graphs.
Note 8:
60Hz mode (internal oscillator) or fEOSC = 307.2kHz ±2% (external
Note 17:
The converter is in internal SCK mode of operation such that the oscillator). SCK pin is used as a digital output.
Note 9:
Simultaneous 50Hz/60Hz mode (internal oscillator) or fEOSC =
Note 18:
For VCC < 3V, VIH is 2.5V for Pin fO. 280kHz ±2% (external oscillator). 2498fg For more information www.linear.com/LTC2498 5 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics (Normal Speed) Electrical Characteristics (2x Speed) Converter Characteristics Analog Input and Reference Digital Inputs and Digital Outputs Power Requirements Digital Inputs and Digital Outputs Typical Performance Characteristics Pin Functions Functional Block Diagram Test Circuits Timing Diagrams Applications Information Package Description Revision History Related Parts
Digital inputs anD Digital outputs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fEOSC External Oscillator Frequency Range (Note 16) l 10 1000 kHz tHEO External Oscillator High Period l 0.125 50 µs tLEO External Oscillator Low Period l 0.125 50 µs tCONV_1 Conversion Time for 1x Speed Mode 50Hz Mode l 157.2 160.3 163.5 ms 60Hz Mode l 131 133.6 136.3 ms Simultaneous 50/60Hz Mode l 144.1 146.9 149.9 ms External Oscillator 41036/fEOSC (in kHz) ms tCONV_2 Conversion Time for 2x Speed Mode 50Hz Mode l 78.7 80.3 81.9 ms 60Hz Mode l 65.6 66.9 68.2 ms Simultaneous 50/60Hz Mode l 72.2 73.6 75.1 ms External Oscillator 20556/fEOSC (in kHz) ms fISCK Internal SCK Frequency Internal Oscillator (Note 10) 38.4 kHz External Oscillator (Notes 10, 11) fEOSC/8 kHz DISCK Internal SCK Duty Cycle (Note 10) l 45 55 % fESCK External SCK Frequency Range (Note 10) l 4000 kHz tLESCK External SCK LOW Period (Note 10) l 125 ns tHESCK External SCK High Period (Note 10) l 125 ns tDOUT_ISCK Internal SCK 32-Bit Data Output Time Internal Oscillator l 0.81 0.83 0.85 ms External Oscillator 256/fEOSC (in kHz) ms tDOUT_ESCK External SCK 32-Bit Data Output Time (Note 10) 32/fESCK (in kHz) ms t1 CS↓ to SDO Low l 0 200 ns t2 CS↑ to SDO Hi-Z l 0 200 ns t3 CS↓ to SCK↑ Internal SCK Mode l 0 200 ns t4 CS↓ to SCK↑ External SCK Mode l 50 ns tKQMAX SCK↓ to SDO Valid l 200 ns tKQMIN SDO Hold After SCK↓ (Note 5) l 15 ns t5 SCK Set-Up Before CS↓ l 50 ns t6 SCK Hold After CS↓ l 50 ns t7 SDI Setup Before SCK↑ (Note 5) l 100 ns t8 SDI Hold After SCK↑ (Note 5) l 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings may
Note 10:
The SCK can be configured in external SCK mode or internal SCK cause permanent damage to the device. Exposure to any Absolute Maximum mode. In external SCK mode, the SCK pin is used as a digital input and the Rating condition for extended periods may affect device reliability and lifetime. driving clock is fESCK. In the internal SCK mode, the SCK pin is used as a
Note 2:
All voltage values are with respect to GND. digital output and the output clock signal during the data output is fISCK.
Note 3:
VCC = 2.7V to 5.5V unless otherwise specified.
Note 11:
The external oscillator is connected to the fO pin. The external VREFCM = VREF/2, FS = 0.5VREF oscillator frequency, fEOSC, is expressed in kHz. VIN = IN+ – IN–, VIN(CM) = (IN+ – IN–)/2,
Note 12:
The converter uses its internal oscillator. where IN+ and IN– are the selected input channels.
Note 13:
The output noise includes the contribution of the internal
Note 4:
Use internal conversion clock or external conversion clock source calibration operations. with fEOSC = 307.2kHz unless other wise specified.
Note 14:
Guaranteed by design and test correlation.
Note 5:
Guaranteed by design, not subject to test.
Note 15:
The converter is in external SCK mode of operation such that the
Note 6:
Integral nonlinearity is defined as the deviation of a code from a SCK pin is used as a digital input. The frequency of the clock signal driving straight line passing through the actual endpoints of the transfer curve. The SCK during the data output is fESCK and is expressed in Hz. deviation is measured from the center of the quantization band.
Note 16:
Refer to Applications Information section for performance vs
Note 7:
50Hz mode (internal oscillator) or fEOSC = 256kHz ±2% (external oscillator). data rate graphs.
Note 8:
60Hz mode (internal oscillator) or fEOSC = 307.2kHz ±2% (external
Note 17:
The converter is in internal SCK mode of operation such that the oscillator). SCK pin is used as a digital output.
Note 9:
Simultaneous 50Hz/60Hz mode (internal oscillator) or fEOSC =
Note 18:
For VCC < 3V, VIH is 2.5V for Pin fO. 280kHz ±2% (external oscillator). 2498fg For more information www.linear.com/LTC2498 5 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics (Normal Speed) Electrical Characteristics (2x Speed) Converter Characteristics Analog Input and Reference Digital Inputs and Digital Outputs Power Requirements Digital Inputs and Digital Outputs Typical Performance Characteristics Pin Functions Functional Block Diagram Test Circuits Timing Diagrams Applications Information Package Description Revision History Related Parts