Datasheet LTC2497 (Analog Devices) - 9

LTC2497
pin FuncTions GND (Pins 1, 4, 6, 31, 32, 33, 34):
Ground. Multiple
ADCINP (Pin 25):
Positive ADC Input. Connect to the ground pins internally connected for optimum ground cur- output of a buffer/amplifier driven by MUXOUTP or short rent flow and VCC decoupling. Connect each one of these directly to MUXOUTP. pins to a common ground plane through a low impedance
ADCINN (Pin 26):
Negative ADC Input. Connect to the connection. All seven pins must be connected to ground output of a buffer/amplifier driven by MUXOUTN or short for proper operation. directly to MUXOUTN
SCL (Pin 2):
Serial Clock Pin of the I2C Interface. The
MUXOUTN (Pin 27):
Negative Multiplexer Output. Con- LTC2497 can only act as a slave and the SCL pin only nect to the input of an external buffer/amplifier or short accepts an external serial clock. Data is shifted into the directly to ADCINN. SDA pin on the rising edges of the SCL clock and output through the SDA pin on the falling edges of the SCL clock.
VCC (Pin 28):
Positive Supply Voltage. Bypass to GND with a 10µF tantalum capacitor in parallel with a 0.1µF ceramic
SDA (Pin 3):
Bidirectional Serial Data Line of the I2C Inter- capacitor as close to the part as possible. face. In the transmitter mode (Read), the conversion result is output through the SDA pin, while in the receiver mode
REF+, REF– (Pin 29, Pin 30):
Differential Reference Input. (Write), the device channel select bits are input through the The voltage on these pins can have any value between SDA pin. The pin is high impedance during the data input GND and VCC as long as the reference positive input, REF+, mode and is an open drain output (requires an appropri- remains more positive than the negative reference input, ate pull-up device to VCC) during the data output mode. REF–, by at least 0.1V. The differential voltage (VREF = REF+ – REF–) sets the full-scale range for all input channels.
NC (Pin 5):
No Connect. This pin can be left floating or tied to GND.
fO (Pin 35):
Frequency Control Pin. Digital input that controls the internal conversion clock rate. When f
COM (Pin 7):
The Common Negative Input (IN–) for All O is connected to GND, the converter uses its internal oscil- Single-Ended Multiplexer Configurations. The voltage on lator running at 307.2kHz. The conversion clock may also CH0-CH15 and COM pins can have any value between be overridden by driving the f GND – 0.3V to V O pin with an external clock CC + 0.3V. Within these limits, the two in order to change the output rate and the digital filter selected inputs (IN+ and IN– ) provide a bipolar input rejection null. range (VIN = IN+ – IN– ) from –0.5 • VREF to 0.5 • VREF. Outside this input range, the converter produces unique
CA0, CA1, CA2 (Pins 36, 37, 38):
Chip Address Control over-range and under-range output codes. Pins. These pins are configured as a three-state (LOW, HIGH, Floating) address control bits for the device I2C
CH0 to CH15 (Pin 8-Pin 23):
Analog Inputs. May be pro- address. grammed for single-ended or differential mode.
GND (Exposed Pad Pin 39):
Ground. This pin is ground
MUXOUTP (Pin 24):
Positive Multiplexer Output. Connect and must be soldered to the PCB ground plane. For pro- to the input of external buffer/amplifier or short directly totyping purposes, this pin may remain floating. to ADCINP. 2497fb For more information www.linear.com/LTC2497 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Analog Input and Reference I2C Inputs And Digital Outputs Power Requirements Digital Inputs And Digital Outputs I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Typical Application Related Parts