Datasheet LTC2497 (Analog Devices) - 4
| Fabricante | Analog Devices |
| Descripción | 16-Bit 8-/16-Channel ΔΣ ADC with Easy Drive Input Current Cancellation and I2C Interface |
| Páginas / Página | 30 / 4 — analog inpuT anD reFerence. The. denotes the specifications which apply … |
| Formato / tamaño de archivo | PDF / 627 Kb |
| Idioma del documento | Inglés |
analog inpuT anD reFerence. The. denotes the specifications which apply over the full operating
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LTC2497
analog inpuT anD reFerence The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)
I – DC_LEAK(IN ) IN– DC Leakage Current Sleep Mode, IN– = GND l –10 1 10 nA IDC_ REF+ DC Leakage Current Sleep Mode, REF+ = VCC l –100 1 100 nA + LEAK(REF ) IDC_ REF– DC Leakage Current Sleep Mode, REF– = GND l –100 1 100 nA – LEAK(REF ) tOPEN MUX Break-Before-Make 50 ns QIRR MUX Off Isolation VIN = 2VP-P DC to 1.8MHz 120 dB
i2c inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l 0.7VCC V VIL Low Level Input Voltage l 0.3VCC V VIHA High Level Input Voltage for Address Pins CA0, CA1, CA2, l 0.95VCC V and Pin fO VILA Low Level Input Voltage for Address Pins CA0, CA1, CA2 l 0.05VCC V RINH Resistance from CA0, CA1, CA2 to VCC to Set Chip Address l 10 kW Bit to 1 RINL Resistance from CA0, CA1, CA2 to GND to Set Chip Address l 10 kW Bit to 0 RINF Resistance from CA0, CA1, CA2 to GND or VCC to Set Chip l 2 MW Address Bit to Float II Digital Input Current l –10 10 µA VHYS Hysteresis of Schmidt Trigger Inputs (Note 5) l 0.05VCC V VOL Low Level Output Voltage (SDA) I = 3mA l 0.4 V tOF Output Fall Time VIH(MIN) to VIL(MAX) Bus Load CB 10pF to l 20 + 0.1CB 250 ns 400pF (Note 14) IIN Input Leakage 0.1VCC ≤ VIN ≤ VCC l 1 µA CCAX External Capacitative Load on Chip Address Pins (CA0, CA1, l 10 pF CA2) for Valid Float
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 2.7 5.5 V ICC Supply Current Conversion Current (Note 11) l 160 275 µA Sleep Mode (Note 11) l 1 2 µA 2497fb 4 For more information www.linear.com/LTC2497 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Analog Input and Reference I2C Inputs And Digital Outputs Power Requirements Digital Inputs And Digital Outputs I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Typical Application Related Parts
analog inpuT anD reFerence The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)
I – DC_LEAK(IN ) IN– DC Leakage Current Sleep Mode, IN– = GND l –10 1 10 nA IDC_ REF+ DC Leakage Current Sleep Mode, REF+ = VCC l –100 1 100 nA + LEAK(REF ) IDC_ REF– DC Leakage Current Sleep Mode, REF– = GND l –100 1 100 nA – LEAK(REF ) tOPEN MUX Break-Before-Make 50 ns QIRR MUX Off Isolation VIN = 2VP-P DC to 1.8MHz 120 dB
i2c inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l 0.7VCC V VIL Low Level Input Voltage l 0.3VCC V VIHA High Level Input Voltage for Address Pins CA0, CA1, CA2, l 0.95VCC V and Pin fO VILA Low Level Input Voltage for Address Pins CA0, CA1, CA2 l 0.05VCC V RINH Resistance from CA0, CA1, CA2 to VCC to Set Chip Address l 10 kW Bit to 1 RINL Resistance from CA0, CA1, CA2 to GND to Set Chip Address l 10 kW Bit to 0 RINF Resistance from CA0, CA1, CA2 to GND or VCC to Set Chip l 2 MW Address Bit to Float II Digital Input Current l –10 10 µA VHYS Hysteresis of Schmidt Trigger Inputs (Note 5) l 0.05VCC V VOL Low Level Output Voltage (SDA) I = 3mA l 0.4 V tOF Output Fall Time VIH(MIN) to VIL(MAX) Bus Load CB 10pF to l 20 + 0.1CB 250 ns 400pF (Note 14) IIN Input Leakage 0.1VCC ≤ VIN ≤ VCC l 1 µA CCAX External Capacitative Load on Chip Address Pins (CA0, CA1, l 10 pF CA2) for Valid Float
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 2.7 5.5 V ICC Supply Current Conversion Current (Note 11) l 160 275 µA Sleep Mode (Note 11) l 1 2 µA 2497fb 4 For more information www.linear.com/LTC2497 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Analog Input and Reference I2C Inputs And Digital Outputs Power Requirements Digital Inputs And Digital Outputs I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Typical Application Related Parts