Datasheet LTC2493 (Analog Devices) - 4

FabricanteAnalog Devices
Descripción24-Bit 2-/4-Channel ∆Σ ADC with Easy Drive Input Current Cancellation and I2C Interface
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a nalog inpuT anD reFerence The. denotes the specifications which apply over the full operating

a nalog inpuT anD reFerence The denotes the specifications which apply over the full operating

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LTC2493
a nalog inpuT anD reFerence The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IN+ Absolute/Common Mode IN+ Voltage GND – 0.3V VCC + 0.3V V (IN+ Corresponds to the Selected Positive Input Channel) IN– Absolute/Common Mode IN– Voltage GND – 0.3V VCC + 0.3V V (IN– Corresponds to the Selected Negative Input Channel to COM) VIN Input Voltage Range (IN+ – IN–) Differential/Single-Ended l –FS +FS V FS Full-Scale of the Input (IN+ – IN–) Differential/Single-Ended l 0.5VREF V LSB Least Significant Bit of the Output Code l FS/224 REF+ Absolute/Common Mode REF+ Voltage l 0.1 VCC V REF– Absolute/Common Mode REF– Voltage l GND REF+ – 0.1V V VREF Reference Voltage Range (REF+ – REF–) l 0.1 VCC V CS(IN+) IN+ Sampling Capacitance 11 pF CS(IN–) IN– Sampling Capacitance 11 pF CS(VREF) VREF Sampling Capacitance 11 pF I + DC_LEAK(IN ) IN+ DC Leakage Current Sleep Mode, IN+ = GND l –10 1 10 nA I – DC_LEAK(IN ) IN– DC Leakage Current Sleep Mode, IN– = GND l –10 1 10 nA I + DC_LEAK(REF ) REF+ DC Leakage Current Sleep Mode, REF+ = VCC l –100 1 100 nA I – DC_LEAK(REF ) REF– DC Leakage Current Sleep Mode, REF– = GND l –100 1 100 nA tOPEN MUX Break-Before-Make 50 ns QIRR MUX Off Isolation VIN = 2VP-P DC to 1.8MHz 120 dB
i2 c inpuTs anD DigiTal ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l 0.7VCC V VIL Low Level Input Voltage l 0.3VCC V VIHA Low Level Input Voltage for Address Pins CA0, CA1 and l 0.05VCC V Pin fO VILA High Level Input Voltage for Address Pins CA0, CA1 l 0.95VCC V RINH Resistance from CA0, CA1 to VCC to Set Chip Address l 10 kΩ Bit to 1 RINL Resistance from CA0, CA1 to GND to Set Chip Address l 10 kΩ Bit to 0 RINF Resistance from CA0, CA1 to GND or VCC to Set Chip l 2 MΩ Address Bit to Float II Digital Input Current (fO) l –10 10 µA VHYS Hysteresis of Schmitt Trigger Inputs (Note 5) l 0.05VCC V VOL Low Level Output Voltage (SDA) I = 3mA l 0.4 V tOF Output Fall Time VIH(MIN) to VIL(MAX) Bus Load CB 10pF to l 20 + 0.1CB 250 ns 400pF (Note 14) IIN Input Leakage (SDA, SCL) 0.1VCC ≤ VIN ≤ 0.9VCC l 1 µA CCAX External Capacitative Load On-Chip Address Pins (CA0, l 10 pF CA1) for Valid Float 2493fe 4 For more information www.linear.com/LTC2493 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics (Normal Speed) Electrical Characteristics (2x Speed) Converter Characteristics Analog Input and Reference I2C Inputs and Digital Outputs Power Requirements Digital Inputs and Digital Outputs I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Typical Application Related Parts