LTC2470/LTC2472 applicaTions inForMaTion t3 t t 1 2 CS D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 SDO MSB LSB SCK tKQ tlSCK thSCK EN1 EN2 SPD SLP SDI DON’T CARE 24702 F05 t4 t5 Figure 5. Data Input/Output TimingTable 1. LTC2470/LTC2472 Output Data FormatSINGLE ENDED INPUT VINDIFFERENTIAL INPUT VOLTAGED15D14D13D12...D2D1D0CORRESPONDING(LTC2470)V +–IN – VIN (LTC2472)(MSB)(LSB)DECIMAL VALUE ≥VREF ≥VREF 1 1 1 1 1 1 65535 VREF – 1LSB VREF – 1LSB 1 1 1 1 1 0 65534 0.75 • VREF 0.5 • VREF 1 1 0 0 0 0 49152 0.75 • VREF – 1LSB 0.5 • VREF – 1LSB 1 0 1 1 1 1 49151 0.5 • VREF 0 1 0 0 0 0 0 32768 0.5 • VREF – 1LSB –1LSB 0 1 1 1 1 1 32767 0.25 • VREF –0.5 • VREF 0 1 0 0 0 0 16384 0.25 • VREF – 1LSB –0.5 • VREF – 1LSB 0 0 1 1 1 1 16383 0 ≤ –VREF 0 0 0 0 0 0 0 Data Input FormatTable 2. Input Data Format The data input word is 4 bits long and consists of two en- BIT NAME FUNCTION able bits (EN1 and EN2) and two programming bits (SPD EN1 Should Be High (EN1 = 1) in Order to Enable Program Mode and SLP) see Table 2. EN1 is applied to the first rising edge EN2 Should Be Low (EN2 = 0) in Order to Enable Program Mode of SCK after the conversion is complete. Programming is SPD Low (SPD = 0, Default) for 208sps, High (SPD = 1) for enabled by setting EN1 = 1 and EN2 = 0. 833sps Output Rate SLP Low (SLP = 0, Default) for Nap Mode, High (SLP = 1) for Sleep Mode Where Both Reference and Converter are Powered Down *SDI May Also Be Tied Directly to GND to Set Output Rate to 208sps or VDD to Set Output Rate to 833sps. Sleep Mode is Disabled if SDI is Tied to GND or VDD. 24702fb 10 For more information www.linear.com/LTC2470 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Analog Inputs Power Requirements Digital Inputs and Digital Outputs Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Package Description Revision History Typical Application Related Parts