Datasheet LTC2460, LTC2462 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | Ultra-Tiny, 16-Bit ΔΣ ADCs with 10ppm/°C Max Precision Reference |
| Páginas / Página | 22 / 6 — Typical perForMance characTerisTics (TA = 25°C, unless otherwise noted). … |
| Formato / tamaño de archivo | PDF / 317 Kb |
| Idioma del documento | Inglés |
Typical perForMance characTerisTics (TA = 25°C, unless otherwise noted). Power Supply Rejection. vs Frequency at VCC
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LTC2460/LTC2462
Typical perForMance characTerisTics (TA = 25°C, unless otherwise noted) Power Supply Rejection vs Frequency at VCC Conversion Time vs Temperature VREF vs VCC
0 21 1.24892 TA = 25°C 1.24891 –20 20 1.24890 19 –40 VCC = 5V, 4.1V, 3V 1.24889 18 –60 (V) 1.24888 17 V REF REJECTION (dB) 1.24887 –80 CONVERSION TIME (ms) 16 1.24886 –100 15 1.24885 –120 14 1.24884 1 10 100 1k 10k 100k 1M 10M –50 –25 0 25 50 75 100 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 FREQUENCY AT VCC (Hz) TEMPERATURE (°C) VCC (V) 24602 G10 24602 G11 24602 G12
pin FuncTions REFOUT (Pin 1):
Reference Output Pin. Nominally 1.25V,
SDO (Pin 6):
Three-State Serial Data Output. SDO is used this voltage sets the fullscale input range of the ADC. For for serial data output during the DATA INPUT/OUTPUT noise and reference stability connect to a 0.1µF capacitor state and can be used to monitor the conversion status. tied to GND. This capacitor value must be less than or
GND (Pins 7, 11):
Ground. Connect directly to the ground equal to the capacitor tied to the reference compensation plane through a low impedance connection. pin (COMP). REFOUT cannot be overdriven by an external reference. For applications that require an input range
REF– (Pin 8):
Negative Reference Input to the ADC. The greater than 0V to 1.25V, please refer to the LTC2450/ voltage on this pin sets the zero input to the ADC. This LTC2452. pin should tie directly to ground or the ground sense of the input sensor.
COMP (Pin 2):
Internal Reference Compensation Pin. For low noise and reference stability, tie a 0.1μF capacitor to
IN+ (LTC2462), IN (LTC2460) (Pin 9):
Positive input volt- GND. age for the LTC2462 differential device. ADC input for the LTC2460 single-ended device.
CS (Pin 3):
Chip Select (Active LOW) Digital Input. A LOW on this pin enables the SDO output. A HIGH on this pin
IN– (LTC2462), GND (LTC2460) (Pin 10):
Negative input places the SDO output pin in a high impedance state and voltage for the LTC2462 differential device. GND for the any inputs on SDI and SCK will be ignored. LTC2460 single-ended device.
SDI (Pin 4):
Serial Data Input Pin. This pin is used to pro-
VCC (Pin 12):
Positive Supply Voltage. Bypass to GND with gram the sleep mode and 30Hz/60Hz output rate (LTC2460). a 10μF capacitor in parallel with a low-series-inductance 0.1μF capacitor located as close to the device as possible.
SCK (Pin 5):
Serial Clock Input. SCK synchronizes the serial data input/output. Once the conversion is complete,
Exposed Pad (Pin 13 – DFN Package):
Ground. Connect a new data bit is produced at the SDO pin following each directly to the ground plane through a low impedance SCK falling edge. Data is shifted into the SDI pin on each connection. rising edge of SCK. 24602fa 6 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Analog Inputs Power Requirements Digital Inputs and Digital Outputs Timing Characteristics Typical Performance Characteristics Pin Functions Applications Information Package Description Revision History Typical Application Related Parts
Typical perForMance characTerisTics (TA = 25°C, unless otherwise noted) Power Supply Rejection vs Frequency at VCC Conversion Time vs Temperature VREF vs VCC
0 21 1.24892 TA = 25°C 1.24891 –20 20 1.24890 19 –40 VCC = 5V, 4.1V, 3V 1.24889 18 –60 (V) 1.24888 17 V REF REJECTION (dB) 1.24887 –80 CONVERSION TIME (ms) 16 1.24886 –100 15 1.24885 –120 14 1.24884 1 10 100 1k 10k 100k 1M 10M –50 –25 0 25 50 75 100 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 FREQUENCY AT VCC (Hz) TEMPERATURE (°C) VCC (V) 24602 G10 24602 G11 24602 G12
pin FuncTions REFOUT (Pin 1):
Reference Output Pin. Nominally 1.25V,
SDO (Pin 6):
Three-State Serial Data Output. SDO is used this voltage sets the fullscale input range of the ADC. For for serial data output during the DATA INPUT/OUTPUT noise and reference stability connect to a 0.1µF capacitor state and can be used to monitor the conversion status. tied to GND. This capacitor value must be less than or
GND (Pins 7, 11):
Ground. Connect directly to the ground equal to the capacitor tied to the reference compensation plane through a low impedance connection. pin (COMP). REFOUT cannot be overdriven by an external reference. For applications that require an input range
REF– (Pin 8):
Negative Reference Input to the ADC. The greater than 0V to 1.25V, please refer to the LTC2450/ voltage on this pin sets the zero input to the ADC. This LTC2452. pin should tie directly to ground or the ground sense of the input sensor.
COMP (Pin 2):
Internal Reference Compensation Pin. For low noise and reference stability, tie a 0.1μF capacitor to
IN+ (LTC2462), IN (LTC2460) (Pin 9):
Positive input volt- GND. age for the LTC2462 differential device. ADC input for the LTC2460 single-ended device.
CS (Pin 3):
Chip Select (Active LOW) Digital Input. A LOW on this pin enables the SDO output. A HIGH on this pin
IN– (LTC2462), GND (LTC2460) (Pin 10):
Negative input places the SDO output pin in a high impedance state and voltage for the LTC2462 differential device. GND for the any inputs on SDI and SCK will be ignored. LTC2460 single-ended device.
SDI (Pin 4):
Serial Data Input Pin. This pin is used to pro-
VCC (Pin 12):
Positive Supply Voltage. Bypass to GND with gram the sleep mode and 30Hz/60Hz output rate (LTC2460). a 10μF capacitor in parallel with a low-series-inductance 0.1μF capacitor located as close to the device as possible.
SCK (Pin 5):
Serial Clock Input. SCK synchronizes the serial data input/output. Once the conversion is complete,
Exposed Pad (Pin 13 – DFN Package):
Ground. Connect a new data bit is produced at the SDO pin following each directly to the ground plane through a low impedance SCK falling edge. Data is shifted into the SDI pin on each connection. rising edge of SCK. 24602fa 6 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Analog Inputs Power Requirements Digital Inputs and Digital Outputs Timing Characteristics Typical Performance Characteristics Pin Functions Applications Information Package Description Revision History Typical Application Related Parts