Datasheet LTC2436-1 (Analog Devices) - 9

LTC2436-1
U U W U APPLICATIO S I FOR ATIO
cycle. There is a one-to-one correspondence between the remains constant at 800nV RMS (or 4.8µVP-P), while the conversion and the output data. Therefore, multiplexing quantization is reduced to 1.5µV per LSB. As a result, multiple analog voltages is easy. lower the reference improves the effective resolution for low level input voltages. The LTC2436-1 performs offset and full-scale calibrations every conversion cycle. This calibration is transparent to
Input Voltage Range
the user and has no effect on the cyclic operation de- scribed above. The advantage of continuous calibration is The analog input is truly differential with an absolute/ extreme stability of offset and full-scale readings with re- common mode range for the CH0+/CH0– or CH1+/CH1– spect to time, supply voltage change and temperature drift. input pins extending from GND – 0.3V to VCC + 0.3V. Outside these limits, the ESD protection devices begin to
Power-Up Sequence
turn on and the errors due to input leakage current increase rapidly. Within these limits, the LTC2436-1 con- The LTC2436-1 automatically enters an internal reset state verts the bipolar differential input signal, V when the power supply voltage V IN = IN+ – IN–, CC drops below approxi- from – FS = – 0.5 • V mately 2V. This feature guarantees the integrity of the REF to +FS = 0.5 • VREF where VREF = REF+ – REF–, with the selected channel referred as IN+ and conversion result and of the serial interface mode selec- IN–. Outside this range, the converter indicates the tion. (See the 2-wire I/O sections in the Serial Interface overrange or the underrange condition using distinct Timing Modes section.) output codes. When the VCC voltage rises above this critical threshold, Input signals applied to the analog input pins may extend the converter creates an internal power-on-reset (POR) by 300mV below ground and above V signal with a typical duration of 1ms. The POR signal clears CC. In order to limit any fault current, resistors of up to 5k may be added in all internal registers and selects channel 0. Following the series with the pins without affecting the performance of POR signal, the LTC2436-1 starts a normal conversion the device. In the physical layout, it is important to main- cycle and follows the succession of states described above. tain the parasitic capacitance of the connection between The first conversion result following POR is accurate within these series resistors and the corresponding pins as low the specifications of the device if the power supply voltage as possible; therefore, the resistors should be located as is restored within the operating range (2.7V to 5.5V) be- close as practical to the pins. The effect of the series fore the end of the POR time interval. resistance on the converter accuracy can be evaluated
Reference Voltage Range
from the curves presented in the Input Current/Reference Current sections. In addition, series resistors will intro- This converter accepts a truly differential external refer- duce a temperature dependent offset error due to the input ence voltage. The absolute/common mode voltage speci- leakage current. A 10nA input leakage current will develop fication for the REF+ and REF– pins covers the entire range a 1LSB offset error on an 8k resistor if VREF = 5V. This error from GND to VCC. For correct converter operation, the has a very strong temperature dependency. REF+ pin must always be more positive than the REF– pin. The LTC2436-1 can accept a differential reference voltage
Output Data Format
from 0.1V to VCC. The converter output noise is deter- The LTC2436-1 serial output data stream is 19 bits long. mined by the thermal noise of the front-end circuits, and The first 3 bits represent status information indicating the as such, its value in nanovolts is nearly constant with conversion state, selected channel and sign. The next 16 reference voltage. A decrease in reference voltage will bits are the conversion result, MSB first. The third and significantly improve the converter’s effective resolution, fourth bit together are also used to indicate an underrange since the thermal noise (800nV) is well below the quanti- condition (the differential input voltage is below –FS) or an zation level of the device (75.6µV for a 5V reference). At the overrange condition (the differential input voltage is above minimum reference (100mV) the thermal noise +FS). 24361f 9