Datasheet LTC2413 (Analog Devices) - 6

FabricanteAnalog Devices
Descripción24-Bit No Latency ∆Σ™ ADC with Simultaneous 50Hz/60Hz Rejection
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T iMing characTerisTics The. denotes the specifications which apply over the full operating temperature

T iMing characTerisTics The denotes the specifications which apply over the full operating temperature

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LTC2413
T iMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fEOSC External Oscillator Frequency Range l 2.56 500 kHz tHEO External Oscillator High Period l 0.25 390 µs tLEO External Oscillator Low Period l 390 µs tCONV Conversion Time FO = 0V l 146.71 ms External Oscillator (Note 10) l 20510/fEOSC (in kHz) ms f ISCK Internal SCK Frequency Internal Oscillator (Note 9) 17.5 kHz External Oscillator (Notes 9, 10) fEOSC/8 kHz DISCK Internal SCK Duty Cycle (Note 9) l 45 55 % fESCK External SCK Frequency Range (Note 8) l 2000 kHz tLESCK External SCK Low Period (Note 8) l 250 ns tHESCK External SCK High Period (Note 8) l 250 ns tDOUT_ISCK Internal SCK 32-Bit Data Output Time Internal Oscillator (Notes 9, 11) l 1.80 1.83 1.86 ms External Oscillator (Notes 9, 10) l 20510/fEOSC (in kHz) ms tDOUT_ESCK External SCK 32-Bit Data Output Time (Note 8) l 32/fESCK (in kHz) ms t1 CS ↓ to SDO Low Z l 0 200 ns t2 CS ↑ to SDO Hi-Z l 0 200 ns t3 CS ↓ to SCK ↓ (Note 9) l 0 200 ns t4 CS ↓ to SCK ↑ (Note 8) l 50 ns tKQMAX SCK ↓ to SDO Valid l 220 ns tKQMIN SDO Hold After SCK ↓ (Note 5) l 15 ns t5 SCK Set-Up Before CS ↓ l 50 ns t6 SCK Hold After CS ↓ l 50 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 7:
FO = 0V (internal oscillator) or fEOSC = 139800Hz ±2% may cause permanent damage to the device. Exposure to any Absolute (external oscillator). Maximum Rating condition for extended periods may affect device
Note 8:
The converter is in external SCK mode of operation such that the reliability and lifetime. SCK pin is used as digital input. The frequency of the clock signal driving
Note 2:
All voltage values are with respect to GND. SCK during the data output is fESCK and is expressed in kHz.
Note 3:
VCC = 2.7V to 5.5V unless otherwise specified.
Note 9:
The converter is in internal SCK mode of operation such that the VREF = REF+ – REF–, VREFCM = (REF+ + REF–)/2; SCK pin is used as digital output. VIN = IN+ – IN–, VINCM = (IN+ + IN–)/2.
Note 10:
The external oscillator is connected to the FO pin. The external
Note 4:
FO pin tied to GND or to external conversion clock source with oscillator frequency, fEOSC, is expressed in kHz. fEOSC = 139800Hz unless otherwise specified.
Note 11:
The converter uses the internal oscillator. FO = 0V.
Note 5:
Guaranteed by design, not subject to test.
Note 12:
The output noise includes the contribution of the internal
Note 6:
Integral nonlinearity is defined as the deviation of a code from a calibration operations. straight line passing through the actual endpoints of the transfer curve.
Note 13:
Guaranteed by design and test correlation. The deviation is measured from the center of the quantization band. 2413fa 6 For more information www.linear.com/LTC2413