LTC2351-14 PIN FUNCTIONSSDO (Pin 1): Three-State Serial Data Output. Each set CH3+ (Pin 14): Noninverting Channel 3. CH3+ operates of six output data words represent the six analog input fully differentially with respect to CH3– with a 0V to 2.5V, channels at the start of the previous conversion. Data for or ±1.25V differential swing and a 0V to VDD absolute CH0 comes out fi rst and data for CH5 comes out last. Each input range. data word comes out MSB fi rst. CH3– (Pin 15): Inverting Channel 3. CH3– operates fully OGND (Pin 2): Ground Return for SDO Currents. Connect differentially with respect to CH3+ with a –2.5V to 0V, to the solid ground plane. or ±1.25V differential swing and a 0V to VDD absolute input range. OVDD (Pin 3): Power Supply for the SDO Pin. OVDD must be no more than 300mV higher than VDD and can CH4+ (Pin 17): Noninverting Channel 4. CH4+ operates be brought to a lower voltage to interface to low voltage fully differentially with respect to CH4– with a 0V to 2.5V, logic families. The unloaded HIGH state at SDO is at the or ±1.25V differential swing and a 0V to VDD absolute potential of OVDD. input range. CH0+ (Pin 4): Noninverting Channel 0. CH0+ operates CH4– (Pin 18): Inverting Channel 4. CH4– operates fully fully differentially with respect to CH0– with a 0V to 2.5V, differentially with respect to CH4+ with a –2.5V to 0V, or or ±1.25V differential swing and a 0V to VDD absolute ±1.25V differential swing and a 0V to VDD absolute input input range. range. CH0– (Pin 5): Inverting Channel 0. CH0– operates fully CH5+ (Pin 20): Noninverting Channel 5. CH5+ operates differentially with respect to CH0+ with a –2.5V to 0V, fully differentially with respect to CH5– with a 0V to 2.5V, or ±1.25V differential swing and a 0V to VDD absolute or ±1.25V differential swing and a 0V to VDD absolute input range. input range. GND (Pins 6, 9, 12, 13, 16, 19): Analog Grounds. These CH5– (Pin 21): Inverting Channel 5. CH5– operates fully ground pins must be tied directly to the solid ground plane differentially with respect to CH5+ with a –2.5V to 0V, or under the part. Analog signal currents fl ow through these ±1.25V differential swing and a 0V to VDD absolute input connections. range. CH1+ (Pin 7): Noninverting Channel 1. CH1+ operates GND (PIN 22): Analog Ground for Reference. Analog fully differentially with respect to CH1– with a 0V to 2.5V, ground must be tied directly to the solid ground plane or ±1.25V differential swing and a 0V to VDD absolute under the part. Analog signal currents fl ow through this input range. connection. The 10μF reference bypass capacitor should be returned to this pad. CH1– (Pin 8): Inverting Channel 1. CH1– operates fully differentially with respect to CH1+ with a –2.5V to 0V, VREF (Pin 23): 2.5V Internal Reference. Bypass to GND and or ±1.25V differential swing and a 0V to VDD absolute a solid analog ground plane with a 10μF ceramic capaci- input range. tor (or 10μF tantalum in parallel with 0.1μF ceramic). Can be overdriven by an external reference voltage between CH2+ (Pin 10): Noninverting Channel 2. CH2+ operates 2.55V and V fully differentially with respect to CH2– with a 0V to 2.5V, DD, VCC. or ±1.25V differential swing and a 0V to VDD absolute VCC (Pin 24): 3V Positive Analog Supply. This pin sup- input range. plies 3V to the analog section. Bypass to the solid analog ground plane with a 10μF ceramic capacitor (or 10μF CH2– (Pin 11): Inverting Channel 2. CH2– operates fully tantalum) in parallel with 0.1μF ceramic. Care should differentially with respect to CH2+ with a –2.5V to 0V, be taken to place the 0.1μF bypass capacitor as close to or ±1.25V differential swing and a 0V to VDD absolute Pin 24 as possible. Pin 24 must be tied to Pin 25. input range. 235114fb 7