Datasheet LTC2348-18 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | Octal, 18-Bit, 200ksps Differential ±10.24V Input SoftSpan ADC with Wide Input Common Mode Range |
| Páginas / Página | 40 / 6 — p ower requireMenTs The. denotes the specifications which apply over the … |
| Formato / tamaño de archivo | PDF / 1.7 Mb |
| Idioma del documento | Inglés |
p ower requireMenTs The. denotes the specifications which apply over the full operating temperature
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LTC2348-18
p ower requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IOVDD Supply Current 200ksps Sample Rate, 8 Channels Enabled (CL = 25pF) l 1.6 2.6 mA Acquisition or Nap Mode l 1 20 μA Power Down Mode l 1 20 μA PD Power Dissipation 200ksps Sample Rate, 8 Channels Enabled l 140 169 mW Acquisition Mode l 125 152 mW Nap Mode l 30 40 mW Power Down Mode (C-Grade and I-Grade) l 0.36 1.4 mW Power Down Mode (H-Grade) l 0.36 2.8 mW
LVDS I/O Mode
OVDD Supply Voltage l 2.375 5.25 V IVDD Supply Current 200ksps Sample Rate, 8 Channels Enabled l 17.7 20.4 mA 200ksps Sample Rate, 8 Channels Enabled, VREFBUF = 5V (Note 15) l 16.1 18.5 mA Acquisition Mode l 3.2 3.8 mA Nap Mode l 3.0 3.7 mA Power Down Mode (C-Grade and I-Grade) l 65 175 μA Power Down Mode (H-Grade) l 65 450 µA IOVDD Supply Current 200ksps Sample Rate, 8 Channels Enabled (RL = 100Ω) l 7 8.5 mA Acquisition or Nap Mode (RL = 100Ω) l 7 8.0 mA Power Down Mode l 1 20 μA PD Power Dissipation 200ksps Sample Rate, 8 Channels Enabled l 166 199 mW Acquisition Mode l 151 180 mW Nap Mode l 55 69 mW Power Down Mode (C-Grade and I-Grade) l 0.36 1.4 mW Power Down Mode (H-Grade) l 0.36 2.8 mW
a Dc TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency 8 Channels Enabled l 200 ksps 7 Channels Enabled l 225 ksps 6 Channels Enabled l 266 ksps 5 Channels Enabled l 300 ksps 4 Channels Enabled l 375 ksps 3 Channels Enabled l 450 ksps 2 Channels Enabled l 625 ksps 1 Channel Enabled l 1000 ksps tCYC Time Between Conversions 8 Channels Enabled, fSMPL = 200ksps l 5000 ns 7 Channels Enabled, fSMPL = 225ksps l 4444 ns 6 Channels Enabled, fSMPL = 266ksps l 3750 ns 5 Channels Enabled, fSMPL = 300ksps l 3333 ns 4 Channels Enabled, fSMPL = 375ksps l 2666 ns 3 Channels Enabled, fSMPL = 450ksps l 2222 ns 2 Channels Enabled, fSMPL = 625ksps l 1600 ns 1 Channel Enabled, fSMPL = 1000ksps l 1000 ns tCONV Conversion Time N Channels Enabled, 1 ≤ N ≤ 8 l 450•N 500•N 550•N ns tACQ Acquisition Time 8 Channels Enabled, fSMPL = 200ksps l 570 980 ns (tACQ = tCYC – tCONV – tBUSYLH) 7 Channels Enabled, fSMPL = 225ksps l 564 924 ns 6 Channels Enabled, fSMPL = 266ksps l 420 730 ns 5 Channels Enabled, fSMPL = 300ksps l 553 813 ns 4 Channels Enabled, fSMPL = 375ksps l 436 646 ns 3 Channels Enabled, fSMPL = 450ksps l 542 702 ns 2 Channels Enabled, fSMPL = 625ksps l 470 580 ns 1 Channel Enabled, fSMPL = 1000ksps l 420 480 ns 234818fa 6 For more information www.linear.com/LTC2348-18 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Revision History Typical Application Related Parts
p ower requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IOVDD Supply Current 200ksps Sample Rate, 8 Channels Enabled (CL = 25pF) l 1.6 2.6 mA Acquisition or Nap Mode l 1 20 μA Power Down Mode l 1 20 μA PD Power Dissipation 200ksps Sample Rate, 8 Channels Enabled l 140 169 mW Acquisition Mode l 125 152 mW Nap Mode l 30 40 mW Power Down Mode (C-Grade and I-Grade) l 0.36 1.4 mW Power Down Mode (H-Grade) l 0.36 2.8 mW
LVDS I/O Mode
OVDD Supply Voltage l 2.375 5.25 V IVDD Supply Current 200ksps Sample Rate, 8 Channels Enabled l 17.7 20.4 mA 200ksps Sample Rate, 8 Channels Enabled, VREFBUF = 5V (Note 15) l 16.1 18.5 mA Acquisition Mode l 3.2 3.8 mA Nap Mode l 3.0 3.7 mA Power Down Mode (C-Grade and I-Grade) l 65 175 μA Power Down Mode (H-Grade) l 65 450 µA IOVDD Supply Current 200ksps Sample Rate, 8 Channels Enabled (RL = 100Ω) l 7 8.5 mA Acquisition or Nap Mode (RL = 100Ω) l 7 8.0 mA Power Down Mode l 1 20 μA PD Power Dissipation 200ksps Sample Rate, 8 Channels Enabled l 166 199 mW Acquisition Mode l 151 180 mW Nap Mode l 55 69 mW Power Down Mode (C-Grade and I-Grade) l 0.36 1.4 mW Power Down Mode (H-Grade) l 0.36 2.8 mW
a Dc TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency 8 Channels Enabled l 200 ksps 7 Channels Enabled l 225 ksps 6 Channels Enabled l 266 ksps 5 Channels Enabled l 300 ksps 4 Channels Enabled l 375 ksps 3 Channels Enabled l 450 ksps 2 Channels Enabled l 625 ksps 1 Channel Enabled l 1000 ksps tCYC Time Between Conversions 8 Channels Enabled, fSMPL = 200ksps l 5000 ns 7 Channels Enabled, fSMPL = 225ksps l 4444 ns 6 Channels Enabled, fSMPL = 266ksps l 3750 ns 5 Channels Enabled, fSMPL = 300ksps l 3333 ns 4 Channels Enabled, fSMPL = 375ksps l 2666 ns 3 Channels Enabled, fSMPL = 450ksps l 2222 ns 2 Channels Enabled, fSMPL = 625ksps l 1600 ns 1 Channel Enabled, fSMPL = 1000ksps l 1000 ns tCONV Conversion Time N Channels Enabled, 1 ≤ N ≤ 8 l 450•N 500•N 550•N ns tACQ Acquisition Time 8 Channels Enabled, fSMPL = 200ksps l 570 980 ns (tACQ = tCYC – tCONV – tBUSYLH) 7 Channels Enabled, fSMPL = 225ksps l 564 924 ns 6 Channels Enabled, fSMPL = 266ksps l 420 730 ns 5 Channels Enabled, fSMPL = 300ksps l 553 813 ns 4 Channels Enabled, fSMPL = 375ksps l 436 646 ns 3 Channels Enabled, fSMPL = 450ksps l 542 702 ns 2 Channels Enabled, fSMPL = 625ksps l 470 580 ns 1 Channel Enabled, fSMPL = 1000ksps l 420 480 ns 234818fa 6 For more information www.linear.com/LTC2348-18 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Revision History Typical Application Related Parts