Datasheet LTC2345-18 (Analog Devices)

FabricanteAnalog Devices
DescripciónOctal, 18-Bit, 200ksps Differential SoftSpan ADC with Wide Input Common Mode Range
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FeaTures. DescripTion. 200ksps per Channel Throughput. Eight Simultaneous Sampling Channels. ±5LSB INL (Maximum, ±4.096V Range)

Datasheet LTC2345-18 Analog Devices

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LTC2345-18 Octal, 18-Bit, 200ksps Differential SoftSpan ADC with Wide Input Common Mode Range
FeaTures DescripTion
n
200ksps per Channel Throughput
The LTC®2345-18 is an 18-bit, low noise 8-channel si- n
Eight Simultaneous Sampling Channels
multaneous sampling successive approximation register n
±5LSB INL (Maximum, ±4.096V Range)
(SAR) ADC with differential, wide common mode range n
Guaranteed 18-Bit, No Missing Codes
inputs. Operating from a 5V low voltage supply and us- n
Differential, Wide Common Mode Range Inputs
ing the internal reference and buffer, each channel of this n
Per-Channel SoftSpan Input Ranges:
SoftSpanTM ADC can be independently configured on a
±4.096V, 0V to 4.096V, ±2.048V, 0V to 2.048V
conversion-by-conversion basis to accept ±4.096, 0V
±5V, 0V to 5V, ±2.5V, 0V to 2.5V
to 4.096V, ±2.048V, or 0V to 2.048V signals. Individual n channels may also be disabled to increase throughput on
91.8dB Single-Conversion SNR (Typical)
n the remaining channels.
−113dB THD (Typical) at fIN = 2kHz
n
102dB CMRR (Typical) at fIN = 200Hz
The wide input common mode range and 102dB CMRR of n
Rail-to-Rail Input Overdrive Tolerance
the LTC2345-18 analog inputs allow the ADC to directly n Guaranteed Operation to 125°C digitize a variety of signals, simplifying signal chain design. n Integrated Reference and Buffer (4.096V) This input signal flexibility, combined with ±5LSB INL, n SPI CMOS (1.8V to 5V) and LVDS Serial I/O no missing codes at 18 bits, and 91.8dB SNR, makes the n Internal Conversion Clock, No Cycle Latency LTC2345-18 an ideal choice for many applications requir- n 81mW Power Dissipation (Typical) ing wide dynamic range. n 48-Lead (7mm x 7mm) QFN Package The LTC2345-18 supports pin-selectable SPI CMOS (1.8V to 5V) and LVDS serial interfaces. Between one and eight
applicaTions
lanes of data output may be employed in CMOS mode, n allowing the user to optimize bus width and throughput. Programmable Logic Controllers L n , LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Industrial Process Control SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property n of their respective owners. Protected by U.S. Patents, including 7705765, 7961132, 8319673. Medical Imaging Other Patents pending. n High Speed Data Acquisition
Typical applicaTion
5V 1.8V TO 5V
Integral Nonlinearity vs
0.1µF 2.2µF 0.1µF
Output Code and Channel
CMOS OR LVDS 2.0 I/O INTERFACE ±4.096V RANGE FULLY FULLY DIFFERENTIAL DRIVE (IN– = –IN+) VDD VDDLBYP OVDD LVDS/CMOS 1.5 ARBITRARY DIFFERENTIAL IN0+ ALL CHANNELS S/H 5V 5V PD IN0– 1.0 S/H LTC2345-18 0.5 S/H SDO0 • • • 0V 0V • • • 0 S/H 18-BIT MUX SDO7 BIPOLAR UNIPOLAR S/H SAR ADC –0.5 SCKO 5V INL ERROR (LSB) 5V SCKI S/H SDI –1.0 S/H CS BUSY –1.5 0V 0V SAMPLE IN7+ S/H CNV CLOCK IN7– –2.0 DIFFERENTIAL INPUTS IN+/IN– WITH REFBUF REFIN GND –131072 –65536 0 65536 131072 WIDE INPUT COMMON MODE RANGE 234518 TA01a OUTPUT CODE 47µF 0.1µF 234518 TA01b EIGHT SIMULTANEOUS SAMPLING CHANNELS 234518f For more information www.linear.com/LTC2345-18 1 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Typical Application Related Parts