Datasheet LTC2325-12 (Analog Devices)
| Fabricante | Analog Devices |
| Descripción | Quad, 12-Bit + Sign, 5Msps/Ch Simultaneous Sampling ADC |
| Páginas / Página | 30 / 1 — FeaTures. DescripTion. 5Msps/Ch Throughput Rate. Four Simultaneously … |
| Formato / tamaño de archivo | PDF / 1.4 Mb |
| Idioma del documento | Inglés |
FeaTures. DescripTion. 5Msps/Ch Throughput Rate. Four Simultaneously Sampling Channels. Guaranteed 12-Bit, No Missing Codes
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LTC2325-12 Quad, 12-Bit + Sign, 5Msps/Ch Simultaneous Sampling ADC
FeaTures DescripTion
n
5Msps/Ch Throughput Rate
The LTC®2325-12 is a low noise, high speed quad 12-bit n
Four Simultaneously Sampling Channels
+ sign successive approximation register (SAR) ADC with n
Guaranteed 12-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input
Operating from a single 3.3V or 5V supply, the LTC2325-12
Common Mode Range
has an 8VP-P differential input range, making it ideal for n
77dB SNR (Typ) at fIN = 2.2MHz
applications which require a wide dynamic range with n
–86dB THD (Typ) at fIN = 2.2MHz
high common mode rejection. The LTC2325-12 achieves n Guaranteed Operation to 125°C ±0.5LSB INL typical, no missing codes at 12 bits and n Single 3.3V or 5V Supply 77dB SNR. n Low Drift (20ppm/°C Max) 2.048V or 4.096V The LTC2325-12 has an onboard low drift (20ppm/°C max) Internal Reference 2.048V or 4.096V temperature-compensated reference. n 1.8V to 2.5V I/O Voltages The LTC2325-12 also has a high speed SPI-compatible n CMOS or LVDS SPI-Compatible Serial I/O serial interface that supports CMOS or LVDS. The fast n Power Dissipation 45mW/Ch (Typ) 5Msps per channel throughput with one cycle latency n Small 52-Lead (7mm × 8mm) QFN Package makes the LTC2325-12 ideally suited for a wide variety of high speed applications. The LTC2325-12 dissipates
applicaTions
only 45mW per channel and offers nap and sleep modes n to reduce the power consumption to 26μW for further High Speed Data Acquisition Systems n power savings during inactive periods. Communications n Optical Networking L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Analog Devices, Inc. All other trademarks are the property of their n Multiphase Motor Control respective owners.
Typical applicaTion
10µF 1µF
32k Point FFT fSMPL = 5Msps, TRUE DIFFERENTIAL INPUTS NO CONFIGURATION REQUIRED f
3.3V OR 5V 1.8V TO 2.5V
IN = 2.2MHz IN+, IN–
0 SNR = 77.1dB VDD GND GND OV ARBITRARY DIFFERENTIAL DD THD = –85.7dB V –20 DD VDD A + 12-BIT SINAD = 76.2dB IN1 S/H +SIGN CMOS/LVDS A – IN1 SFDR = 90.3dB SAR ADC SDR/DDR REFBUFEN –40 + 12-BIT 0V 0V AIN2 +SIGN A – S/H SDO1 –60 IN2 SAR ADC SDO2 SDO3 LTC2325-12 SDO4 –80 12-BIT CLKOUT BIPOLAR UNIPOLAR A + IN3 V – S/H +SIGN SCK AMPLITUDE (dBFS) DD VDD AIN3 SAR ADC –100 CNV SAMPLE 12-BIT A + CLOCK IN4 +SIGN –120 A – S/H 0V 0V IN4 SAR ADC –140 REF REFOUT1 REFOUT2 REFOUT3 REFOUT4 0 0.5 1 1.5 2 2.5 FOUR SIMULTANEOUS SAMPLING CHANNELS 1µF 10µF 10µF 10µF 10µF FREQUENCY (MHz) 232512 TA01b 232512 TA01a 232512f For more information www.linear.com/LTC2325-12 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts
FeaTures DescripTion
n
5Msps/Ch Throughput Rate
The LTC®2325-12 is a low noise, high speed quad 12-bit n
Four Simultaneously Sampling Channels
+ sign successive approximation register (SAR) ADC with n
Guaranteed 12-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input
Operating from a single 3.3V or 5V supply, the LTC2325-12
Common Mode Range
has an 8VP-P differential input range, making it ideal for n
77dB SNR (Typ) at fIN = 2.2MHz
applications which require a wide dynamic range with n
–86dB THD (Typ) at fIN = 2.2MHz
high common mode rejection. The LTC2325-12 achieves n Guaranteed Operation to 125°C ±0.5LSB INL typical, no missing codes at 12 bits and n Single 3.3V or 5V Supply 77dB SNR. n Low Drift (20ppm/°C Max) 2.048V or 4.096V The LTC2325-12 has an onboard low drift (20ppm/°C max) Internal Reference 2.048V or 4.096V temperature-compensated reference. n 1.8V to 2.5V I/O Voltages The LTC2325-12 also has a high speed SPI-compatible n CMOS or LVDS SPI-Compatible Serial I/O serial interface that supports CMOS or LVDS. The fast n Power Dissipation 45mW/Ch (Typ) 5Msps per channel throughput with one cycle latency n Small 52-Lead (7mm × 8mm) QFN Package makes the LTC2325-12 ideally suited for a wide variety of high speed applications. The LTC2325-12 dissipates
applicaTions
only 45mW per channel and offers nap and sleep modes n to reduce the power consumption to 26μW for further High Speed Data Acquisition Systems n power savings during inactive periods. Communications n Optical Networking L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Analog Devices, Inc. All other trademarks are the property of their n Multiphase Motor Control respective owners.
Typical applicaTion
10µF 1µF
32k Point FFT fSMPL = 5Msps, TRUE DIFFERENTIAL INPUTS NO CONFIGURATION REQUIRED f
3.3V OR 5V 1.8V TO 2.5V
IN = 2.2MHz IN+, IN–
0 SNR = 77.1dB VDD GND GND OV ARBITRARY DIFFERENTIAL DD THD = –85.7dB V –20 DD VDD A + 12-BIT SINAD = 76.2dB IN1 S/H +SIGN CMOS/LVDS A – IN1 SFDR = 90.3dB SAR ADC SDR/DDR REFBUFEN –40 + 12-BIT 0V 0V AIN2 +SIGN A – S/H SDO1 –60 IN2 SAR ADC SDO2 SDO3 LTC2325-12 SDO4 –80 12-BIT CLKOUT BIPOLAR UNIPOLAR A + IN3 V – S/H +SIGN SCK AMPLITUDE (dBFS) DD VDD AIN3 SAR ADC –100 CNV SAMPLE 12-BIT A + CLOCK IN4 +SIGN –120 A – S/H 0V 0V IN4 SAR ADC –140 REF REFOUT1 REFOUT2 REFOUT3 REFOUT4 0 0.5 1 1.5 2 2.5 FOUR SIMULTANEOUS SAMPLING CHANNELS 1µF 10µF 10µF 10µF 10µF FREQUENCY (MHz) 232512 TA01b 232512 TA01a 232512f For more information www.linear.com/LTC2325-12 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts