Datasheet LTC2309 (Analog Devices) - 10

LTC2309 AppLICAtIOns InFORMAtIOn
Overview Programming the LTC2309
The LTC2309 is a low noise, 8-channel, 12-bit succes- The various modes of operation of the LTC2309 are sive approximation register (SAR) A/D converter with an programmed by a 6-bit DIN word. The SDI input data I2C compatible serial interface. The LTC2309 includes a bits are loaded on the rising edge of SCL during a write precision internal reference and a configurable 8-chan- operation, with the S/D bit loaded on the first rising edge nel analog input multiplexer (MUX). The ADC may be and the SLP bit on the sixth rising edge (see Figure 8b configured to accept single-ended or differential signals in the I2C Interface section). The input data word is and can operate in either unipolar or bipolar mode. A defined as follows: sleep mode option is also provided to further reduce power during inactive periods. S/D O/S S1 S0 UNI SLP The LTC2309 communicates through a 2-wire I2C S/D = SINGLE-ENDED/DIFFERENTIAL BIT compatible serial interface. Conversions are initiated O/S = ODD/SIGN BIT by signaling a STOP condition after the part has been successfully addressed for a read/write operation. The S1 = CHANNEL SELECT BIT 1 device wil not acknowledge (NACK) an external request S0 = CHANNEL SELECT BIT 0 until the conversion is finished. After a conversion is finished, the device is ready to accept a read/write UNI = UNIPOLAR/BIPOLAR BIT request. Once the LTC2309 is addressed for a read SLP = SLEEP MODE BIT operation, the device begins outputting the conver- sion result under the control of the serial clock (SCL).
Analog Input Multiplexer
There is no latency in the conversion result. There are The analog input MUX is programmed by the S/D, 12 bits of output data followed by 4 trailing zeros. Data O/S, S1 and S0 bits of the D is updated on the falling edges of SCL, allowing the IN word. Table 1 lists the MUX configurations for all combinations of the con- user to reliably latch data on the rising edge of SCL. A figuration bits. Figure 1a shows several possible MUX write operation may follow the read operation by using configurations and Figure 1b shows how the MUX can a repeat START or a STOP condition may be given to be reconfigured from one conversion to the next. start a new conversion. By selecting a write operation, the ADC can be programmed with a 6-bit DIN word. The
Driving the Analog Inputs
DIN word configures the MUX and programs various modes of operation of the ADC. The analog inputs of the LTC2309 are easy to drive. Each of the analog inputs can be used as a single-ended During a conversion, the internal 12-bit capacitive input relative to the COM pin (CH0-COM, CH1-COM, charge redistribution DAC output is sequenced through etc.) or in differential input pairs (CH0 and CH1, CH2 a successive approximation algorithm by the SAR start- and CH3, CH4 and CH5, CH6 and CH7). Figure 2 shows ing from the most significant bit (MSB) to the least how to drive COM for single-ended inputs in unipolar significant bit (LSB). The sampled input is successively and bipolar modes. Regardless of the MUX configura- compared with binary weighted charges supplied by tion, the “+” and “–” inputs are sampled at the same the capacitive DAC using a differential comparator. At instant. Any unwanted signal that is common to both the end of a conversion, the DAC output balances the inputs will be reduced by the common mode rejection analog input. The SAR contents (a 12-bit data word) of the sample-and-hold circuit. The inputs draw only that represent the sampled analog input are loaded into one small current spike while charging the sample-and- 12 output latches that allow the data to be shifted out hold capacitors during the acquire mode. In conversion via the I2C interface. 2309fd 0 Document Outline Features Description Applications Absolute Maximum Ratings Pin Configuration Order Information CONVERTER AND MULTIPLEXER CHARACTERISTICS ANALOG INPUT DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS I2C Inputs and Digital Outputs POWER REQUIREMENTS I2C TIMING CHARACTERISTICS ADC TIMING CHARACTERISTICS Typical Performance Characteristics Pin Functions Functional Block Diagram TIMING DIAGRAM Applications Information Package Description Revision History Typical Application Related Parts