Datasheet LTC2269 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | 16-Bit, 20Msps Low Noise ADC |
| Páginas / Página | 32 / 7 — POWER REQUIREMENTS. The. denotes the specifications which apply over the … |
| Formato / tamaño de archivo | PDF / 775 Kb |
| Idioma del documento | Inglés |
POWER REQUIREMENTS. The. denotes the specifications which apply over the full operating temperature
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LTC2269
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IVDD Analog Supply Current Sine Wave Input, 1.75mA Mode 50 mA Sine Wave Input, 3.5mA Mode l 50.6 56.2 mA IOVDD Digital Supply Current Sine Wave Input, 1.75mA Mode 21.1 mA (OVDD = 1.8V) Sine Wave Input, 3.5mA Mode l 40.9 46 mA PDISS Power Dissipation Sine Wave Input, 1.75mA Mode 127 mW Sine Wave Input, 3.5mA Mode l 161 184 mW
All Output Modes
PSLEEP Sleep Mode Power 0.5 mW PNAP Nap Mode Power 10 mW PDIFFCLK Power Increase with Differential Encode Mode Enabled 20 mW (No Increase for Nap or Sleep Modes)
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fS Sampling Frequency (Note 10) l 1 20 MHz tL ENC Low Time (Note 8) Duty Cycle Stabilizer Off l 23.5 25 500 ns Duty Cycle Stabilizer On l 2 25 500 ns tH ENC High Time (Note 8) Duty Cycle Stabilizer Off l 23.5 25 500 ns Duty Cycle Stabilizer On l 2 25 500 ns tAP Sample-and-Hold 0 ns Acquisition Delay Time
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS DIGITAL DATA OUTPUTS (CMOS MODES: FULL DATA RATE AND DOUBLE DATA RATE)
tD ENC to Data Delay CL = 5pF (Note 8) l 1.1 1.7 3.1 ns tC ENC to CLKOUT Delay CL = 5pF (Note 8) l 1 1.4 2.6 ns tSKEW DATA to CLKOUT Skew tD – tC (Note 8) l 0 0.3 0.6 ns Pipeline Latency Full Data Rate Mode 6 6 Cycles Double Data Rate Mode 6.5 6.5 Cycles
DIGITAL DATA OUTPUTS (LVDS MODE)
tD ENC to Data Delay CL = 5pF (Note 8) l 1.1 1.8 3.2 ns tC ENC to CLKOUT Delay CL = 5pF (Note 8) l 1 1.5 2.7 ns tSKEW DATA to CLKOUT Skew tD – tC (Note 8) l 0 0.3 0.6 ns Pipeline Latency 6.5 6.5 Cycles
SPI PORT TIMING (Note 8)
tSCK SCK Period Write Mode l 40 ns Readback Mode, CSDO = 20pF, RPULLUP = 2k l 250 ns tS CS to SCK Setup Time l 5 ns tH SCK to CS Setup Time l 5 ns tDS SDI Setup Time l 5 ns tDH SDI Hold Time l 5 ns tDO SCK Falling to SDO Valid Readback Mode, CSDO = 20pF, RPULLUP = 2k l 125 ns 2269f 7
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IVDD Analog Supply Current Sine Wave Input, 1.75mA Mode 50 mA Sine Wave Input, 3.5mA Mode l 50.6 56.2 mA IOVDD Digital Supply Current Sine Wave Input, 1.75mA Mode 21.1 mA (OVDD = 1.8V) Sine Wave Input, 3.5mA Mode l 40.9 46 mA PDISS Power Dissipation Sine Wave Input, 1.75mA Mode 127 mW Sine Wave Input, 3.5mA Mode l 161 184 mW
All Output Modes
PSLEEP Sleep Mode Power 0.5 mW PNAP Nap Mode Power 10 mW PDIFFCLK Power Increase with Differential Encode Mode Enabled 20 mW (No Increase for Nap or Sleep Modes)
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fS Sampling Frequency (Note 10) l 1 20 MHz tL ENC Low Time (Note 8) Duty Cycle Stabilizer Off l 23.5 25 500 ns Duty Cycle Stabilizer On l 2 25 500 ns tH ENC High Time (Note 8) Duty Cycle Stabilizer Off l 23.5 25 500 ns Duty Cycle Stabilizer On l 2 25 500 ns tAP Sample-and-Hold 0 ns Acquisition Delay Time
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS DIGITAL DATA OUTPUTS (CMOS MODES: FULL DATA RATE AND DOUBLE DATA RATE)
tD ENC to Data Delay CL = 5pF (Note 8) l 1.1 1.7 3.1 ns tC ENC to CLKOUT Delay CL = 5pF (Note 8) l 1 1.4 2.6 ns tSKEW DATA to CLKOUT Skew tD – tC (Note 8) l 0 0.3 0.6 ns Pipeline Latency Full Data Rate Mode 6 6 Cycles Double Data Rate Mode 6.5 6.5 Cycles
DIGITAL DATA OUTPUTS (LVDS MODE)
tD ENC to Data Delay CL = 5pF (Note 8) l 1.1 1.8 3.2 ns tC ENC to CLKOUT Delay CL = 5pF (Note 8) l 1 1.5 2.7 ns tSKEW DATA to CLKOUT Skew tD – tC (Note 8) l 0 0.3 0.6 ns Pipeline Latency 6.5 6.5 Cycles
SPI PORT TIMING (Note 8)
tSCK SCK Period Write Mode l 40 ns Readback Mode, CSDO = 20pF, RPULLUP = 2k l 250 ns tS CS to SCK Setup Time l 5 ns tH SCK to CS Setup Time l 5 ns tDS SDI Setup Time l 5 ns tDH SDI Hold Time l 5 ns tDO SCK Falling to SDO Valid Readback Mode, CSDO = 20pF, RPULLUP = 2k l 125 ns 2269f 7