Datasheet LTC2258-14, LTC2257-14, LTC2256-14 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | 14-Bit, 65Msps Ultralow Power 1.8V ADCs |
| Páginas / Página | 34 / 8 — TiMing DiagraMs. Full-Rate CMOS Output Mode Timing. All Outputs Are … |
| Formato / tamaño de archivo | PDF / 1.4 Mb |
| Idioma del documento | Inglés |
TiMing DiagraMs. Full-Rate CMOS Output Mode Timing. All Outputs Are Single-Ended and Have CMOS Levels
Línea de modelo para esta hoja de datos
- LTC2256CUJ-14#PBF LTC2256CUJ-14#PBF LTC2256CUJ-14#TRPBF LTC2256CUJ-14#TRPBF LTC2256IUJ-14#PBF LTC2256IUJ-14#PBF LTC2256IUJ-14#TRPBF LTC2256IUJ-14#TRPBF
Versión de texto del documento
LTC2258-14 LTC2257-14/LTC2256-14
TiMing DiagraMs Full-Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD D0-D13, OF N – 5 N – 4 N – 3 N – 2 N – 1 tC CLKOUT+ CLKOUT– 225814 TD01
Double Data Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1 D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D0N-2 D1N-2 ••• D12_13 D12N-5 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 OF OFN-5 OFN-4 OFN-3 OFN-2 tC tC CLKOUT+ CLKOUT– 225814 TD02 225814fc 8 Fo F r o rmo m r o e r e inf n o f r o m r a m t a iton o n ww w w w . w line n a e r a .co c m o / m L / T L C T 2 C 2 2 5 2 8 5 - 8 1 - 4 1 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configurations Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts
TiMing DiagraMs Full-Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD D0-D13, OF N – 5 N – 4 N – 3 N – 2 N – 1 tC CLKOUT+ CLKOUT– 225814 TD01
Double Data Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1 D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D0N-2 D1N-2 ••• D12_13 D12N-5 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 OF OFN-5 OFN-4 OFN-3 OFN-2 tC tC CLKOUT+ CLKOUT– 225814 TD02 225814fc 8 Fo F r o rmo m r o e r e inf n o f r o m r a m t a iton o n ww w w w . w line n a e r a .co c m o / m L / T L C T 2 C 2 2 5 2 8 5 - 8 1 - 4 1 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configurations Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts