Datasheet LTC2240-10 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | 10-Bit, 170Msps ADC |
| Páginas / Página | 28 / 6 — TIMING CHARACTERISTICS The. denotes the specifi cations which apply over … |
| Formato / tamaño de archivo | PDF / 480 Kb |
| Idioma del documento | Inglés |
TIMING CHARACTERISTICS The. denotes the specifi cations which apply over the full operating temperature
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LTC2240-10
TIMING CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
DATA to CLKOUT Skew (tC – tD) (Note 7) l –0.6 0 0.6 ns Pipeline Latency Full Rate CMOS 5 Cycles Demuxed Interleaved 5 Cycles Demuxed Simultaneous 5 and 6 Cycles
ELECTRICAL CHARACTERISTICS Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when may cause permanent damage to the device. Exposure to any Absolute the output code fl ickers between 00 0000 0000 and 11 1111 1111 in 2’s Maximum Rating condition for extended periods may affect device complement output mode. reliability and lifetime.
Note 7:
Guaranteed by design, not subject to test.
Note 2:
All voltage values are with respect to ground with GND and OGND
Note 8:
Recommended operating conditions. wired together (unless otherwise noted).
Note 9:
VDD = 2.5V, fSAMPLE = 170MHz, differential ENC+/ENC– = 2VP-P
Note 3:
When these pin voltages are taken below GND or above VDD, they sine wave, input range = 1VP-P with differential drive, output CLOAD = 5pF. will be clamped by internal diodes. This product can handle input currents
Note 10:
SNR minimum and typical values are for LVDS mode. Typical of greater than 100mA below GND or above VDD without latchup. values for CMOS mode are typically 0.2dB lower.
Note 4:
VDD = 2.5V, fSAMPLE = 170MHz, LVDS outputs, differential
Note 11:
SFDR minimum values are for LVDS mode. Typical values are for ENC+/ENC– = 2VP-P sine wave, input range = 2VP-P with differential both LVDS and CMOS modes. drive, unless otherwise noted.
Note 12:
SINAD minimum and typical values are for LVDS mode. Typical
Note 5:
Integral nonlinearity is defi ned as the deviation of a code from values for CMOS mode are typically 0.2dB lower. a “best straight line” fi t to the transfer curve. The deviation is measured from the center of the quantization band.
TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C unless otherwise noted, Note 4) 8192 Point FFT, fIN = 5MHz, Integral Nonlinearity Differential Nonlinearity –1dB, 2V Range, LVDS Mode
1.0 1.0 0 0.8 0.8 –10 0.6 0.6 –20 –30 0.4 0.4 –40 0.2 0.2 –50 0 0 –60 INL (LSB) –0.2 DNL (LSB) –0.2 –70 AMPLITUDE (dB) –0.4 –0.4 –80 –0.6 –0.6 –90 –0.8 –0.8 –100 –1.0 –1.0 –110 0 256 512 768 1024 0 256 512 768 1024 0 10 20 30 40 50 60 70 80 OUTPUT CODE OUTPUT CODE FREQUENCY (MHz) 224010 G01 224010 G02 224010 G03 224010fb 6
TIMING CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
DATA to CLKOUT Skew (tC – tD) (Note 7) l –0.6 0 0.6 ns Pipeline Latency Full Rate CMOS 5 Cycles Demuxed Interleaved 5 Cycles Demuxed Simultaneous 5 and 6 Cycles
ELECTRICAL CHARACTERISTICS Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when may cause permanent damage to the device. Exposure to any Absolute the output code fl ickers between 00 0000 0000 and 11 1111 1111 in 2’s Maximum Rating condition for extended periods may affect device complement output mode. reliability and lifetime.
Note 7:
Guaranteed by design, not subject to test.
Note 2:
All voltage values are with respect to ground with GND and OGND
Note 8:
Recommended operating conditions. wired together (unless otherwise noted).
Note 9:
VDD = 2.5V, fSAMPLE = 170MHz, differential ENC+/ENC– = 2VP-P
Note 3:
When these pin voltages are taken below GND or above VDD, they sine wave, input range = 1VP-P with differential drive, output CLOAD = 5pF. will be clamped by internal diodes. This product can handle input currents
Note 10:
SNR minimum and typical values are for LVDS mode. Typical of greater than 100mA below GND or above VDD without latchup. values for CMOS mode are typically 0.2dB lower.
Note 4:
VDD = 2.5V, fSAMPLE = 170MHz, LVDS outputs, differential
Note 11:
SFDR minimum values are for LVDS mode. Typical values are for ENC+/ENC– = 2VP-P sine wave, input range = 2VP-P with differential both LVDS and CMOS modes. drive, unless otherwise noted.
Note 12:
SINAD minimum and typical values are for LVDS mode. Typical
Note 5:
Integral nonlinearity is defi ned as the deviation of a code from values for CMOS mode are typically 0.2dB lower. a “best straight line” fi t to the transfer curve. The deviation is measured from the center of the quantization band.
TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C unless otherwise noted, Note 4) 8192 Point FFT, fIN = 5MHz, Integral Nonlinearity Differential Nonlinearity –1dB, 2V Range, LVDS Mode
1.0 1.0 0 0.8 0.8 –10 0.6 0.6 –20 –30 0.4 0.4 –40 0.2 0.2 –50 0 0 –60 INL (LSB) –0.2 DNL (LSB) –0.2 –70 AMPLITUDE (dB) –0.4 –0.4 –80 –0.6 –0.6 –90 –0.8 –0.8 –100 –1.0 –1.0 –110 0 256 512 768 1024 0 256 512 768 1024 0 10 20 30 40 50 60 70 80 OUTPUT CODE OUTPUT CODE FREQUENCY (MHz) 224010 G01 224010 G02 224010 G03 224010fb 6