Datasheet LTC2203, LTC2202 (Analog Devices)
| Fabricante | Analog Devices |
| Descripción | 16-Bit, 10Msps ADC |
| Páginas / Página | 32 / 1 — FEATURES. DESCRIPTION. Sample Rate: 25Msps/10Msps. 81.6dB SNR and 100dB … |
| Formato / tamaño de archivo | PDF / 1.5 Mb |
| Idioma del documento | Inglés |
FEATURES. DESCRIPTION. Sample Rate: 25Msps/10Msps. 81.6dB SNR and 100dB SFDR (2.5V Range)
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LTC2203/LTC2202 16-Bit, 25Msps/10Msps ADCs
FEATURES DESCRIPTION
n
Sample Rate: 25Msps/10Msps
The LTC®2203/LTC2202 are 25Msps/10Msps, sampling n
81.6dB SNR and 100dB SFDR (2.5V Range)
16-bit A/D converters designed for digitizing high frequen- n
SFDR 90dB at 70MHz (1.667VP-P Input Range)
cy, wide dynamic range signals with input frequencies up n
PGA Front End (2.5VP-P or 1.667VP-P Input Range)
to 380MHz. The input range of the ADC can be optimized n
380MHz Full Power Bandwidth S/H
with the PGA front end. n
Optional Internal Dither
The LTC2203/LTC2202 are perfect for demanding app- n
Optional Data Output Randomizer
lications, with AC performance that includes 81.6dB n Single 3.3V Supply SNR and 100dB spurious free dynamic range (SFDR). n Power Dissipation: 220mW/140mW Maximum DC specs include ±4LSB INL, ±1LSB DNL (no n Clock Duty Cycle Stabilizer missing codes). n Out-of-Range Indicator n Pin Compatible Family A separate output power supply allows the CMOS output 25Msps: LTC2203 (16-Bit) swing to range from 0.5V to 3.6V. 10Msps: LTC2202 (16-Bit) A single-ended CLK input controls converter operation. An n 48-Pin (7mm × 7mm) QFN Package optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.
APPLICATIONS
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Protected by U.S. Patents including 4843302, 6949965B1. Telecommunications n Receivers n Cellular Base Stations n Spectrum Analysis n Imaging Systems n ATE
TYPICAL APPLICATION LTC2203: 128K Point FFT, fIN = 5.1MHz, –1dBFS, PGA = 0
3.3V 0 SENSE –10 –20 OV 1.25V INTERNAL ADC DD VCM 0.5V TO 3.6V –30 COMMON MODE REFERENCE 2.2μF BIAS VOLTAGE GENERATOR 1μF –40 –50 OF –60 A + IN + CLKOUT+ 16-BIT CORRECTION OUTPUT –70 CLKOUT– ANALOG S/H PIPELINED LOGIC AND DRIVERS CMOS –80 INPUT AMP D15 ADC CORE SHIFT REGISTER OUTPUTS –90 – – • A • IN AMPLITUDE (dBFS) • –100 D0 –110 OGND –120 CLOCK/DUTY –130 CYCLE V 3.3V DD CONTROL 1μF 1μF 1μF –140 GND 0 2 4 6 8 10 12 FREQUENCY(MHz) 22032 TA02 CLK PGA SHDN DITH MODE OE RAND 22032 TA01 ADC CONTROL INPUTS 22032fd 1
FEATURES DESCRIPTION
n
Sample Rate: 25Msps/10Msps
The LTC®2203/LTC2202 are 25Msps/10Msps, sampling n
81.6dB SNR and 100dB SFDR (2.5V Range)
16-bit A/D converters designed for digitizing high frequen- n
SFDR 90dB at 70MHz (1.667VP-P Input Range)
cy, wide dynamic range signals with input frequencies up n
PGA Front End (2.5VP-P or 1.667VP-P Input Range)
to 380MHz. The input range of the ADC can be optimized n
380MHz Full Power Bandwidth S/H
with the PGA front end. n
Optional Internal Dither
The LTC2203/LTC2202 are perfect for demanding app- n
Optional Data Output Randomizer
lications, with AC performance that includes 81.6dB n Single 3.3V Supply SNR and 100dB spurious free dynamic range (SFDR). n Power Dissipation: 220mW/140mW Maximum DC specs include ±4LSB INL, ±1LSB DNL (no n Clock Duty Cycle Stabilizer missing codes). n Out-of-Range Indicator n Pin Compatible Family A separate output power supply allows the CMOS output 25Msps: LTC2203 (16-Bit) swing to range from 0.5V to 3.6V. 10Msps: LTC2202 (16-Bit) A single-ended CLK input controls converter operation. An n 48-Pin (7mm × 7mm) QFN Package optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.
APPLICATIONS
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n Protected by U.S. Patents including 4843302, 6949965B1. Telecommunications n Receivers n Cellular Base Stations n Spectrum Analysis n Imaging Systems n ATE
TYPICAL APPLICATION LTC2203: 128K Point FFT, fIN = 5.1MHz, –1dBFS, PGA = 0
3.3V 0 SENSE –10 –20 OV 1.25V INTERNAL ADC DD VCM 0.5V TO 3.6V –30 COMMON MODE REFERENCE 2.2μF BIAS VOLTAGE GENERATOR 1μF –40 –50 OF –60 A + IN + CLKOUT+ 16-BIT CORRECTION OUTPUT –70 CLKOUT– ANALOG S/H PIPELINED LOGIC AND DRIVERS CMOS –80 INPUT AMP D15 ADC CORE SHIFT REGISTER OUTPUTS –90 – – • A • IN AMPLITUDE (dBFS) • –100 D0 –110 OGND –120 CLOCK/DUTY –130 CYCLE V 3.3V DD CONTROL 1μF 1μF 1μF –140 GND 0 2 4 6 8 10 12 FREQUENCY(MHz) 22032 TA02 CLK PGA SHDN DITH MODE OE RAND 22032 TA01 ADC CONTROL INPUTS 22032fd 1